Mitsubishi Electric QJ81DL96 User Manual page 103

Melsec q series, high speed data logger module
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3
SPECIFICATIONS
(3) Error code of access target CPU 1 to 64 (address 1530 to 1593)
The error code ( Section 18.2) which indicates the definition of the occurred error
is stored in the area corresponding to the access target CPU where the error has
occurred.
POINT
The following occur when an access target CPU error occurs.
(Example) When an error occurred in the access target CPU for access target
CPU setting No. 16.
• Access target CPU error (X16) turns ON.
• Bit 15 in the access target CPU error information area (address: 1504) in
the buffer memory turns ON.
• The error code is stored in access target CPU 16 error code area
(address: 1545) in the buffer memory.
3.4.10 Access target CPU setting status area (address: 1500 to 1593)
3.4 Buffer Memory List
1
2
3
4
5
6
7
8
3
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