Mitsubishi Electric QJ81DL96 User Manual page 288

Melsec q series, high speed data logger module
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11
FUNCTIONS OF CONFIGURATION TOOL (MODULE SETTINGS)
(3) Common precautions on synchronization with programmable controller
Deviation
11
- 43
11.4 Common Setting
11.4.2 Time synchronization setting
CPU and SNTP
When synchronizing with the time of the programmable controller CPU or SNTP
server, the time of the high speed data logger module is changed. Especially when
the time of the programmable controller CPU is changed or when the synchronization
with the SNTP is succeeded after the communications with the SNTP server fails, the
time of the high speed data logger module may be greatly changed.
Since changing the time of the high speed logger module affects cycles, time
determination, and time stamp of the data logging, event logging, and report
functions, configure the module to synchronize its time as little as possible.
(a) When the time of the high speed data logger module is set forward by time
synchronization
• Cycle determination
Sampling and condition establishment time may be shorter than the specified
cycle.
• Time determination
Conditions may be established immediately after the time updates.
(b) When the time of the high speed data logger module is set back by time
synchronization
• Cycle determination
Sampling and condition establishment time may be longer than the specified
cycle.
• Time determination
Established condition may be established again.
(c) Effect on time stamps
When the time is set, there is a rare possibility that a deviation may occur in the
time information of the data logging file, event logging file, or report file.
2009/02/01 15:48:32.8
2009/02/01 15:48:32.9
2009/02/01 15:48:32.0
2009/02/01 15:48:32.1
2009/02/01 15:48:32.2
1028
30.5
1029
31.5
1030
32.5
1031
33.5
1032
34.5
Data are normally sampled in 100ms intervals.
21.8
15.9
22.8
16.9
23.8
17.9
24.8
18.9
25.8
19.9

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