0X4300: Interrupt Flag Register (Itc_Iflg) - Epson S1C17001 Technical Manual

0x4300: Interrupt Flag Register (ITC_IFLG)

Register name Address Bit
Interrupt Flag 0x4300 D15
Register (16 bits)
D14
(ITC_IFLG)
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
D[15:8] IIFT[7:0]: Interrupt Flags (for Pulse Trigger)
These are interrupt flags indicating the interrupt factor occurrence status.
1(R): Interrupt factor present
0(R): No interrupt factor (default)
1(W): Reset flag
0(W): Disabled
The interrupt flags are reset to 1 if an interrupt factor occurs in the peripheral modules.
An interrupt is generated to the S1C17 core provided the following conditions are met:
1. The corresponding interrupt enable bit is set to 1.
2. No other interrupt having requests higher priority levels have occurred.
3. The PSR IE bit was set to 1 (interrupt permitted).
4. The corresponding interrupt level setting bit has been set to a higher level than the S1C17 core inter-
rupt level (IL).
The interrupt flags are set to 1 when an interrupt factor occurs regardless of the interrupt enable bit or
interrupt level setting bit states.
The interrupt flags must be reset and the PSR must be reset (by setting the IE bit to 1 or with the reti
command) to accept the next interrupt after interrupt occurrence.
An interrupt factor flag set to 1 is reset by writing 1.
Interrupt flag
IIFT0 (D8)
IIFT1 (D9)
IIFT2 (D10)
IIFT3 (D11)
IIFT4 (D12)
IIFT5 (D13)
IIFT6 (D14)
IIFT7 (D15)
S1C17001 TECHNICAL MANUAL
Name Function
IIFT7 I 2 C interrupt flag
IIFT6 SPI interrupt flag
IIFT5 Remote controller interrupt flag
IIFT4 UART interrupt flag
IIFT3 16-bit timer Ch.2 interrupt flag
IIFT2 16-bit timer Ch.1 interrupt flag
IIFT1 16-bit timer Ch.0 interrupt flag
IIFT0 8-bit timer interrupt flag
EIFT7 PWM&capture timer interrupt flag 1 Cause of
EIFT6 reserved
EIFT5 reserved
EIFT4 8-bit OSC1 timer interrupt flag
EIFT3 Clock timer interrupt flag
EIFT2 Stopwatch timer interrupt flag
EIFT1 P1 port interrupt flag
EIFT0 P0 port interrupt flag
Table 6.7.2: Hardware interrupt factors and interrupt flags
8-bit timer interrupt: Timer underflow
16-bit timer Ch.0 interrupt: Timer underflow
16-bit timer Ch.1 interrupt: Timer underflow
16-bit timer Ch.2 interrupt: Timer underflow
UART interrupt: Transmit buffer empty/Receive buffer full/Receive error
Remote controller interrupt: Data length counter underflow/Input rise-up/Input drop-
off
SPI interrupt: Transmit buffer empty/Receive buffer full
2
I C interrupt: Transmit buffer empty/Receive buffer full
EPSON
6 INITERRUPT CONTROLLER
Setting
1 Cause of 0 Cause of
interrupt interrupt not
occurred occurred
0 Cause of
interrupt interrupt not
occurred occurred
Hardware interrupt factor
Init. R/W Remarks
0 R/W Reset by writing 1.
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W Reset by writing 1 in
pulse trigger mode.
0 R/W
0 R/W
Cannot be reset by
0 R/W
software in level trig-
0 R/W
ger mode.
0 R/W
0 R/W
0 R/W
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