0X5342: Remc H Carrier Length Setup Register (Remc_Carh) - Epson S1C17001 Technical Manual

Cmos 16-bit single chip microcontroller
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0x5342: REMC H Carrier Length Setup Register (REMC_CARH)

Register name Address
Bit
REMC H Carrier
0x5342
D7–6 –
Length Setup
(8 bits)
D5–0 REMCH[5:0] H carrier length setup
Register
(REMC_CARH)
D[7:6]
Reserved
D[5:0]
REMCH[5:0]: H Carrier Length Setup Bits
Set the carrier signal H section length. (Default: 0x0)
Specify a value corresponding to the number of carrier generation clock cycles selected by CG-
CLK[3:0] (D[7:4]/REMC_PSC register) + 1.
Calculate carrier H section length as follows:
Carrier H section length = —————— [s]
REMCH: REMCH[5:0] settings
clk_in:
The L section length is specified by REMCL[5:0] (D[5:0]/REMC_CARL register).
The carrier signal is generated from these settings as shown in Figure 21.7.1.
Example: CGCLK[3:0] = 0x2 (PCLK-1/4), REMCH[5:0] = 2, REMCL[5:0] = 1
PSC output clock
Count
Carrier
S1C17001 TECHNICAL MANUAL
Name
Function
reserved
REMCH + 1
clk_in
Prescaler output clock frequency
PCLK
0
Carrier H section length
Figure 21.7.1: Carrier signal generation
Setting
0x0 to 0x3f
1
2
0
Carrier L section length
EPSON
21 REMOTE CONTROLLER (REMC)
Init. R/W
0 when being read.
0x0 R/W
1
0
Remarks
281

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