Epson S1C17001 Technical Manual page 18

Cmos 16-bit single chip microcontroller
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Type
Shift & swap
sr
sa
sl
swap
Immediate extension ext
Conversion
cv.ab
cv.as
cv.al
cv.la
cv.ls
Branch
jpr
jpr.d
jpa
ipa.d
jrgt
jrgt.d
jrge
jrge.d
jrlt
jrlt.d
jrle
jrle.d
jrugt
jrugt.d
jruge
jruge.d
jrult
jrult.d
jrule
jrule.d
jreq
jreq.d
jrne
jrne.d
call
call.d
calla
calla.d
ret
ret.d
int
intl
reti
reti.d
brk
retd
System control
nop
halt
slp
ei
di
*1: Command ld.a accesses 32-bit memory. When data is transferred from register to memory, 32 bits of data with
the first 8 bits set to 0 are written to memory. When data is read from memory, the first 8 bits are ignored.
*2: Coprocessor commands are reserved, since the S1C17001 does not include a coprocessor.
S1C17001 TECHNICAL MANUAL
Mnemonic
%rd,%rs
Right logic shift (shift bit number specified by register)
%rd,imm7
Right logic shift (shift bit number specified by immediate)
Right operation shift (shift bit number specified by register)
%rd,%rs
%rd,imm7
Right operation shift (shift bit number specified by immediate)
%rd,%rs
Left logic shift (shift bit number specified by register)
%rd,imm7
Left logic shift (shift bit number specified by immediate)
Byte swap at 16-bit boundary
%rd,%rs
imm13
Extend operand for next command
%rd,%rs
Convert 8-bit coded data to 24 bits
%rd,%rs
Convert 16-bit coded data to 24 bits
Convert 32-bit data to 24 bits
%rd,%rs
%rd,%rs
Convert 24-bit data to 32 bits
%rd,%rs
Convert 16-bit data to 32 bits
PC-relative jump
sign10
%rb
Allows delayed branching
imm7
Absolute jump
%rb
Allows delayed branching
sign7
Conditional PC-relative jump
Allows delayed branching
sign7
Conditional PC-relative jump
Allows delayed branching
sign7
Conditional PC-relative jump
Allows delayed branching
sign7
Conditional PC-relative jump
Allows delayed branching
Conditional PC-relative jump
sign7
Allows delayed branching
sign7
Conditional PC-relative jump
Allows delayed branching
sign7
Conditional PC-relative jump
Allows delayed branching
sign7
Conditional PC-relative jump
Allows delayed branching
sign7
Conditional PC-relative jump
Allows delayed branching
sign7
Conditional PC-relative jump
Allows delayed branching
sign10
PC-relative subroutine call
%rb
Allows delayed branching
Absolute subroutine call
imm7
%rb
Allows delayed branching
Return from subroutine
Allows delayed branching
imm5
Software interrupt
imm5,imm3
Software interrupt with interrupt level specification
Return from interrupt
Allows delayed branching
Debug interrupt
Return from debug processing
No operation
HALT
SLEEP
Permits interrupt
Prevents interrupt
Function
Branch conditions: !Z & !(N ^ V)
Branch conditions: !(N ^ V)
Branch conditions: N ^ V
Branch conditions: Z | N ^ V
Branch conditions: !Z & !C
Branch conditions: !C
Branch conditions: C
Branch conditions: Z | C
Branch conditions: Z
Branch conditions: !Z
EPSON
2 CPU
9

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