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19 SPI
19.1 SPI Configuration
The S1C17001 incorporates a synchronized serial interface module (SPI). This SPI module supports both Master
and Slave modes and is used for 8-bit data transfers. Four different data transfer timing patterns (clock phase and
polarity) can be selected.
The SPI module includes a transmit data buffer and receive data buffer separate from the shift register, and is ca-
pable of generating two different interrupt types (transmit buffer empty and receive buffer full). This allows easy
processing of continuous serial data transfer using interrupts.
Figure 19.1.1 illustrates the SPI module configuration.
Internal bus
ITC
SPI clock
(from 16-bit timer Ch.1)
S1C17001 TECHNICAL MANUAL
Receive data
buffer (1 byte)
Bus I/F
and
control
register
Transmit data
Interrupt
buffer (1 byte)
control
Figure 19.1.1: SPI module configuration
EPSON
Shift register
Clock/transfer control
Shift register
19 SPI
SDI
SPICLK
#SPISS
SDO
SPI
233
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