Transfer Clock - Epson S1C17001 Technical Manual

18.3 Transfer Clock

The UART transfer clock can be set to internal or external using SSCK (D0/UART_MOD register).
∗ SSCK: Input Clock Select Bit in the UART Mode (UART_MOD) Register (D0/0x4103)
Note: Make sure the UART is halted (when RXEN/UART_CTL register = 0) before changing SSCK.
∗ RXEN: UART Enable Bit in the UART Control (UART_CTL) Register (D0/0x4104)
Internal clock
Setting SSCK to 0 (default) selects the internal clock. Since the UART uses the 8-bit timer output clock as the
transfer clock, the 8-bit timer must be programmed to output a clock suited to the transfer rate.
For detailed information on 8-bit timer control, refer to "12 8-bit Timer (T8F)."
External clock
Setting SSCK to 1 selects the external clock. In this case, set P25 to the SCLK pin (see Section 18.2) to input
the external clock.
Note: • The UART generates a sampling clock that divides the 8-bit timer output into 1/16 divisions.
Be careful when setting the transfer rate.
• To input the external clock via the SCLK pin, the clock frequency must be less than half of
the PCLK and have a duty ratio of 50%.
S1C17001 TECHNICAL MANUAL
EPSON
18 UART
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