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6
Interrupt Controller
6.1
Configuration of interrupt Controller
The S1C63003/004/008/016 supports the interrupts listed below.
Interrupt
External interrupt
Key input interrupt
Internal interrupt
Watchdog timer interrupt
Programmable timer interrupt
Serial interface interrupt
Clock timer interrupt
Stopwatch timer interrupt
R/F converter interrupt
To enable an interrupt, the interrupt flag must be set to "1" (EI) and the corresponding interrupt mask register must
be set to "1" (enable).
When an interrupt occurs, the interrupt flag is automatically reset to "0" (DI), and interrupts after that are disabled.
The watchdog timer interrupt is an NMI (non-maskable interrupt), therefore, the interrupt is generated regardless of
the interrupt flag setting. Also the interrupt mask register is not provided. However, it is possible to disable NMI since
software can stop the watchdog timer operation.
Figure 6.1.1 shows the configuration of the interrupt circuit.
Note: After an initial reset, all the interrupts including NMI are masked until both the stack pointers SP1
and SP2 are set with the software. Be sure to set the SP1 and SP2 in the initialize routine.
Further, when re-setting the stack pointer, the SP1 and SP2 must be set as a pair. When one of
them is set, all the interrupts including NMI are masked and interrupts cannot be accepted until the
other one is set.
S1C63003/004/008/016 TeChniCal Manual
(Rev. 1.1)
Table 6.
1.1 Interrupt types
S1C63016
8 systems
Seiko epson Corporation
6 inTeRRuPT COnTROlleR
S1C63008
S1C63004
8 systems
NMI, 1 system
6 systems
1 system
8 systems
4 systems
3 systems
S1C63003
4 systems
1 system
–
4 systems
2 systems
6-1
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