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20.6 I
C Interrupts
The I
C module includes a function for generating the following two different interrupt types.
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• Transmit buffer empty interrupt
• Receive buffer full interrupt
The I
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C module outputs one interrupt signal shared by the two above interrupt factor types to the interrupt control-
ler (ITC).
Transmit buffer empty interrupt
To use this interrupt, set TINTE (D0/I2C_ICTL register) to 1. If TINTE is set to 0 (default), interrupt requests
for this factor will not be sent to the ITC.
∗ TINTE: Transmit Interrupt Enable Bit in the I
If transmit buffer empty interrupts are permitted (TINTE = 1), an interrupt request pulse is output to the ITC as
soon as the transmit data set in RTDT[7:0] (D[7:0]/I2C_DAT register) is transferred to the shift register.
∗ RTDT[7:0]: Receive/Transmit Data Bits in the I
An interrupt occurs if other interrupt conditions are satisfied.
Receive buffer full interrupt
To use this interrupt, set RINTE (D1/I2C_ICTL register) to 1. If RINTE is set to 0 (default), interrupt requests
for this factor will not be sent to the ITC.
∗ RINTE: Receive Interrupt Enable Bit in the I
If receive buffer full interrupts are permitted (RINTE = 1), an interrupt request pulse is output to the ITC as
soon as the data received in the shift register is loaded to RTDT[7:0].
An interrupt occurs if other interrupt conditions are met.
I
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C interrupt ITC registers
The control bits for the I
Interrupt flag
∗ IIFT7: I
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C Interrupt Flag in the Interrupt Flag (ITC_IFLG) Register (D15/0x4300)
Interrupt enable bit
∗ IIEN7: I
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C Interrupt Enable Bit in the Interrupt Enable (ITC_EN) Register (D15/0x4302)
Interrupt level setting bit
∗ IILV7[2:0]: I
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C Interrupt Level Bits in the Internal Interrupt Level Setup (ITC_ILV3) Register 3 (D[10:8]/0x4314)
If an interrupt request pulse is output by the I
If the IIEN7 interrupt enable bit is set to 1, the ITC sends an interrupt request to the S1C17 core. To prohibit
I
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C interrupts, set IIEN7 to 0.
The IIFT7 flag is set to 1 by a I
The IILV7[2:0] interrupt level setting bit sets the I
S1C17001 TECHNICAL MANUAL
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C Interrupt Control (I2C_ICTL) Register (D0/0x4346)
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C Interrupt Control (I2C_ICTL) Register (D1/0x4346)
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C module in the ITC are listed below.
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C module, the IIFT7 interrupt flag is set to 1.
C interrupt request pulse, regardless of the IIEN7 bit setting (i.e., even if set to 0).
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2
C Data (I2C_DAT) Register (D[7:0]/0x4344)
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C interrupt level (0 to 7).
EPSON
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20 I
C
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