Vector Table - Epson S1C17001 Technical Manual

2.4 Vector Table

The vector table contains the vectors (processing routine start addresses) for interrupt processing routines. When an
interrupt occurs, the S1C17 core reads the vector corresponding to the interrupt and executes that processing routine.
The boot address for starting program execution must be written at the top of the vector table after resetting.
The S1C17001 vector table starts from address 0x8000. The vector table base address can be read from the TTBR
(vector table base register) at address 0xffff80.
Table 2.4.1 shows the S1C17001 vector table.
Vector No./ Soft-
Vector address
ware interrupt No.
0 (0x00) 0x8000
1 (0x01) 0x8004
– (0xfffc00)
2 (0x02) 0x8008
3 (0x03) 0x800c
4 (0x04) 0x8010
5 (0x05) 0x8014
6 (0x06) 0x8018
7 (0x07) 0x801c
8 (0x08) 0x8020
9 (0x09) 0x8024
10 (0x0a) 0x8028
11 (0x0b) 0x802c
12 (0x0c) 0x8030
13 (0x0d) 0x8034
14 (0x0e) 0x8038
15 (0x0f) 0x803c
16 (0x10) 0x8040
17 (0x11) 0x8044
18 (0x12) 0x8048
19 (0x13) 0x804c
20 (0x14) 0x8050
:
31 (0x1f) 0x807c
*1: When same interrupt level is set
*2: Watchdog timer interrupt selects reset or NMI using software.
0xffff80: Vector Table Base Register (TTBR)
Register name Address Bit
Vector Table 0xffff80 D31–24
Base Register (32 bits)
D23–0 TTBR[23:0] Vector table base address
(TTBR)
S1C17001 TECHNICAL MANUAL
Table 2.4.1: Vector table
Hardware interrupt name
Reset
Irregular address interrupt
Debug interrupt
NMI
reserved
P0 port interrupt
P1 port interrupt
Stopwatch timer interrupt
Clock timer interrupt
8-bit OSC1 timer interrupt
reserved
PWM & capture timer interrupt
8-bit timer interrupt
16-bit timer Ch.0 interrupt
16-bit timer Ch.1 interrupt
16-bit timer Ch.2 interrupt
UART interrupt
Remote controller interrupt
SPI interrupt
2
I C interrupt
: reserved
Name Function
– Unused (fixed at 0)
Hardware interrupt factor
• Low input to #RESET pin
• Watchdog timer overflow
Memory access command
brk command etc.
Watchdog timer overflow
P00 to P07 port input
P10 to P17 port input
• Timer 100 Hz signal
• Timer 10 Hz signal
• Timer 1 Hz signal
• Timer 32 Hz signal
• Timer 8 Hz signal
• Timer 2 Hz signal
• Timer 1 Hz signal
Compare match
• Compare A
• Compare B
Timer underflow
Timer underflow
Timer underflow
Timer underflow
• Transmit buffer empty
• Receive buffer full
• Receive error
• Data length counter underflow
• Input rising edge detection
• Input falling edge detection
• Transmit buffer empty
• Receive buffer full
• Transmit buffer empty
• Receive buffer full
Setting
0x0
0x8000
EPSON
2 CPU
Priority
1
*2
2
3
*2
4
– –
High
–
–
Low
Init. R/W Remarks
0x0 R
0x80 R
00
*1
*1
11