Pwm & Capture Timer Operating Modes - Epson S1C17001 Technical Manual

Cmos 16-bit single chip microcontroller
Table of Contents

Advertisement

13 PWM & CAPTURE TIMER (T16E)
13.2 PWM & Capture Timer Operating Modes
The PWM & capture timer has the following two operating modes:
1. Internal clock mode (Timer counting internal clock)
2. External clock mode (Functions as event counter)
The operating mode is selected using CLKSEL (D3/T16E_CTL register).
∗ CLKSEL: Input Clock Select Bit in the PWM Timer Control (T16E_CTL) Register (D3/0x5306)
Setting CLKSEL to 0 (default) selects internal clock mode, while setting to 1 selects external clock mode.
Internal clock mode
Internal clock mode uses the prescaler output clock as the count clock.
The count clock is selected by the T16EDF[3:0] (D[3:0]/T16E_CLK register) from the 15 types generated by
the prescaler dividing the PCLK clock into 1/1 to 1/16 K divisions.
∗ T16EDF[3:0]: Timer Input Clock Select Bits in the PWM Timer Input Clock Select (T16E_CLK) Register
(D[3:0]/0x5308)
T16EDF[3:0]
0xf
0xe
0xd
0xc
0xb
0xa
0x9
0x8
Note: • The prescaler must run before operating the PWM & capture timer in internal clock mode.
• Make sure the PWM & capture timer count is halted before changing count clock settings.
For detailed information on the prescaler control, see "9 Prescaler (PSC)."
External clock mode
External clock mode uses the clock and pulses input via the P27 (EXCL3) port as a count clock. These inputs
can also be used as an event counter. Timer operations other than the input clock are the same as for internal
clock mode.
To input the EXCL3 clock from the P27 port, P27MUX (D7/P2_PMUX register) must be written as 1 and the
P27 pin function must be changed.
∗ P27MUX: P27 Port Function Select Bit in the P2 Port Function Select (P2_PMUX) Register
The PWM & capture timer increments counts based on the input signal rising edge.
The PWM & capture timer does not use the prescaler in this mode. If no other peripheral modules are using the
prescaler clock, the prescaler can be stopped to reduce current consumption.
142
Table 13.2.1: Prescaler clock selection
Prescaler output clock
Reserved
PCLK-1/16384
PCLK-1/8192
PCLK-1/4096
PCLK-1/2048
PCLK-1/1024
PCLK-1/512
PCLK-1/256
EPSON
T16EDF[3:0]
Prescaler output clock
0x7
PCLK-1/128
0x6
0x5
0x4
0x3
0x2
0x1
0x0
S1C17001 TECHNICAL MANUAL
PCLK-1/64
PCLK-1/32
PCLK-1/16
PCLK-1/8
PCLK-1/4
PCLK-1/2
PCLK-1/1
(Default: 0x0)

Advertisement

Table of Contents
loading

Table of Contents