Osc3 Oscillator Circuit - Epson S1C17001 Technical Manual

Cmos 16-bit single chip microcontroller
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7 OSCILLATOR CIRCUIT (OSC)

7.2 OSC3 Oscillator Circuit

The OSC3 oscillator circuit generates the main clock (max. 8.2 MHz) for high-speed operation of the S1C17 core
and peripheral circuits. The oscillator circuit can be either crystal- or ceramic-based. It also supports external clock
input.
C
G3
OSC3
X'tal3
R
or
f
Ceramic
R
OSC4
C
d
D3
V
SS
(1) Crystal/ceramic oscillator circuit
When used as a crystal or ceramic oscillator circuit, a crystal oscillator (X'tal3) or ceramic oscillator (Ceramic)
and feedback resistor (R
) should be connected between the OSC3 and OSC4 pins. Two capacitors (C
f
should also be connected between the OSC3/OSC4 pins and V
the OSC4 pin and C
, if required.
D3
When used with external clock input, the OSC4 pin should be left free, and a clock with a duty ratio of 50% at
LV
level should be input to the OSC3 pin.
DD
OSC3 oscillation on/off
The OSC3 oscillator circuit stops oscillating if OSC3EN (D0/OSC_CTL register) is set to 0 and starts oscillat-
ing if set to 1. The OSC3 oscillator circuit stops oscillating even in SLEEP mode.
∗ OSC3EN: OSC3 Enable Bit in the Oscillation Control (OSC_CTL) Register (D0/0x5061)
After initial resetting, OSC3EN is set to 1 and the OSC3 oscillator circuit is on. Since the OSC3 clock is used
as the system clock, the S1C17 core begins operating using the OSC3 clock.
56
OSC3
Oscillator circuit
control signal
SLEEP control
Figure 7.2.1 illustrates the OSC3 oscillator circuit configuration.
OSC3
LV
DD
V
SS
External
clock
N.C.
OSC4
. A drain resistor (R
SS
EPSON
OSC3
Oscillator circuit
control signal
SLEEP control
(2) External clock input
and C
G3
) should be connected between
d
S1C17001 TECHNICAL MANUAL
)
D3

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