Epson S1C17001 Technical Manual page 28

Peripheral circuit Address
Clock timer 0x5000
(8-bit device)
0x5001
0x5002
0x5003
0x5004 to 0x501f –
Stopwatch timer 0x5020
(8-bit device)
0x5021
0x5022
0x5023
0x5024 to 0x503f –
Watchdog timer 0x5040
(8-bit device)
0x5041
0x5042 to 0x505f –
Oscillator circuit 0x5060
(8-bit device)
0x5061
0x5062
0x5063
0x5064
0x5065
0x5066 to 0x507f –
Clock generator 0x5080
(8-bit device)
0x5081
0x5082 to 0x509f –
8-bit OSC1 timer 0x50c0
(8-bit device)
0x50c1
0x50c2
0x50c3
0x50c4
0x50c5 to 0x50df –
P port & port 0x5200
MUX
0x5201
(8-bit device)
0x5202
0x5203
0x5204
0x5205
0x5206
0x5207
0x5208
0x5209
0x520a to 0x520f –
0x5210
0x5211
0x5212
0x5213
0x5214
0x5215
0x5216
0x5217
0x5218 to 0x521f –
0x5220
0x5221
0x5222
0x5223
0x5224 to 0x522f –
0x5230
0x5231
0x5232
0x5233
0x5234 to 0x527f –
0x52a0
0x52a1
0x52a2
0x52a3
0x52a4 to 0x52bf –
S1C17001 TECHNICAL MANUAL
Table 3.4.3.2: I/O map (internal peripheral circuit area 2)
Register name
CT_CTL Clock Timer Control Register
CT_CNT Clock Timer Counter Register
CT_IMSK Clock Timer Interrupt Mask Register
CT_IFLG Clock Timer Interrupt Flag Register
–
SWT_CTL Stopwatch Timer Control Register
SWT_BCNT Stopwatch Timer BCD Counter Register
SWT_IMSK Stopwatch Timer Interrupt Mask Register
SWT_IFLG Stopwatch Timer Interrupt Flag Register
–
WDT_CTL Watchdog Timer Control Register
WDT_ST Watchdog Timer Status Register
–
OSC_SRC Clock Source Select Register
OSC_CTL Oscillation Control Register
OSC_NFEN Noise Filter Enable Register
– –
OSC_FOUT FOUT Control Register
OSC_T8OSC1 T8OSC1 Clock Control Register
–
CLG_PCLK PCLK Control Register
CLG_CCLK CCLK Control Register
–
T8OSC1_CTL 8-bit OSC1 Timer Control Register
T8OSC1_CNT 8-bit OSC1 Timer Counter Data Register
T8OSC1_CMP 8-bit OSC1 Timer Compare Data Register
T8OSC1_IMSK 8-bit OSC1 Timer Interrupt Mask Register
T8OSC1_IFLG 8-bit OSC1 Timer Interrupt Flag Register
–
P0_IN P0 Port Input Data Register
P0_OUT P0 Port Output Data Register
P0_IO P0 Port I/O Direction Control Register
P0_PU P0 Port Pull-up Control Register
– –
P0_IMSK P0 Port Interrupt Mask Register
P0_EDGE P0 Port Interrupt Edge Select Register
P0_IFLG P0 Port Interrupt Flag Register
P0_CHAT P0 Port Chattering Filter Control Register
P0_KRST P0 Port Key-Entry Reset Configuration Regis-
ter
–
P1_IN P1 Port Input Data Register
P1_OUT P1 Port Output Data Register
P1_IO P1 Port I/O Direction Control Register
P1_PU P1 Port Pull-up Control Register
– –
P1_IMSK P1 Port Interrupt Mask Register
P1_EDGE P1 Port Interrupt Edge Select Register
P1_IFLG P1 Port Interrupt Flag Register
–
P2_IN P2 Port Input Data Register
P2_OUT P2 Port Output Data Register
P2_IO P2 Port I/O Direction Control Register
P2_PU P2 Port Pull-up Control Register
–
P3_IN P3 Port Input Data Register
P3_OUT P3 Port Output Data Register
P3_IO P3 Port I/O Direction Control Register
P3_PU P3 Port Pull-up Control Register
–
P0_PMUX P0 Port Function Select Register
P1_PMUX P1 Port Function Select Register
P2_PMUX P2 Port Function Select Register
P3_PMUX P3 Port Function Select Register
–
EPSON
3 MEMORY MAP AND BUS CONTROL
Function
Timer reset and RUN/STOP control
Counter data
Interrupt mask setting
Interrupt occurrence status display/reset
Reserved
Timer reset and RUN/STOP control
BCD Counter data
Interrupt mask setting
Interrupt occurrence status display/reset
Reserved
Timer reset and RUN/STOP control
Timer mode setting and NMI status display
Reserved
Clock source selection
Oscillation control
Noise filter ON/OFF
Reserved
Clock external output control
8-bit OSC1 timer clock setting
Reserved
PCLK feed control
CCLK division ratio setting
Reserved
Timer mode setting and timer RUN/STOP
Counter data
Compare data setting
Interrupt mask setting
Interrupt occurrence status display/reset
Reserved
P0 port input data
P0 port output data
P0 port input/output direction selection
P0 port pull-up control
Reserved
P0 port interrupt mask setting
P0 port interrupt edge selection
P0 port interrupt occurrence status display/
reset
P0 port chattering filter control
P0 port key entry reset setting
Reserved
P1 port input data
P1 port output data
P1 port input/output direction selection
P1 port pull-up control
Reserved
P1 port interrupt mask setting
P1 port interrupt edge selection
P1 port interrupt occurrence status display/
reset
Reserved
P2 port input data
P2 port output data
P2 port input/output direction selection
P2 port pull-up control
Reserved
P3 port input data
P3 port output data
P3 port input/output direction selection
P3 port pull-up control
Reserved
P0 port function selection
P1 port function selection
P2 port function selection
P3 port function selection
Reserved
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