Spi - Epson S1C17001 Technical Manual

0x4320–0x4326
Register name Address Bit
SPI Status 0x4320 D15–3 –
Register (16 bits)
D2
(SPI_ST)
D1
D0
SPI Transmit 0x4322 D15–8 –
Data Register (16 bits)
D7–0 SPTDB[7:0] SPI transmit data buffer
(SPI_TXD)
SPI Receive 0x4324 D15–8 –
Data Register (16 bits)
D7–0 SPRDB[7:0] SPI receive data buffer
(SPI_RXD)
SPI Control 0x4326 D15–6 –
Register (16 bits)
D5
(SPI_CTL)
D4
D3
D2
D1
D0
S1C17001 TECHNICAL MANUAL
Name Function
reserved
SPBSY Transfer busy flag (master)
ss signal low flag (slave)
SPRBF Receive data buffer full flag
SPTBE Transmit data buffer empty flag
reserved
SPTDB7 = MSB
SPTDB0 = LSB
reserved
SPRDB7 = MSB
SPRDB0 = LSB
reserved
SPRIE Receive data buffer full int. enable 1 Enable
SPTIE
Transmit data buffer empty int. enable 1 Enable
CPHA Clock phase select
CPOL Clock polarity select
MSSL Master/slave mode select
SPEN SPI enable
EPSON
APPENDIX A I/O REGISTER LIST
Setting Init. R/W
–
1 Busy 0 Idle
1 ss = L 0 ss = H
1 Full 0 Not full
1 Empty 0 Not empty
–
0x0 to 0xff 0x0 R/W
–
0x0 to 0xff 0x0
–
0 Disable
0 Disable
1 Data out 0 Data in
1 Active L 0 Active H
1 Master 0 Slave
1 Enable 0 Disable

SPI

Remarks
– – 0 when being read.
0 R
0 R
1 R
– – 0 when being read.
– – 0 when being read.
R
– – 0 when being read.
0 R/W
0 R/W
0 R/W These bits must be
set before setting
0 R/W
SPEN to 1.
0 R/W
0 R/W
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