Cpu; S1C17 Core Features - Epson S1C17001 Technical Manual

2 CPU

The S1C17001 uses an S1C17 core as the core processor.
The S1C17 core is an original Seiko Epson 16-bit RISC processor.
It features low power consumption, high-speed operation, wide address space, main command single-clock execu-
tion, and gate-saving design. It is ideal for use in controllers or sequencers, in which 8-bit CPUs are widely used.
For detailed information on the S1C17 core, refer to the S1C17 Family S1C17 Core Manual.

2.1 S1C17 Core Features

Processor type
• Seiko Epson original 16-bit RISC processor
• 0.35 μm to 0.15 μm low-power CMOS process technology
Command set
• Code length
• Number of commands
• Execution cycle
• Immediate expansion commands
• Compact, high-speed command set optimized for development with C
Register set
• 24-bit general purpose register x 8
• 24-bit special register x 2
• 8-bit special register x 1
Memory space, buses
• Up to 16 Mbytes of memory space (24-bit address)
• Harvard architecture with separate command bus (16-bit) and data bus (32-bit)
Interrupt
• Supports reset, NMI, and 32 different types of external interrupt
• Irregular address interrupt
• Debug interrupt
• Reading vector from vector table and direct branching to interrupt processing routines
• Permits software interrupts using vector numbers (all vector numbers can be specified)
Power saving
• HALT (halt command)
• SLEEP (slp command)
S1C17001 TECHNICAL MANUAL
Fixed 16-bit length
111 basic commands (184 in total)
Main commands executed in one cycle
Expansion of immediate to 24 bits
EPSON
2 CPU
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