0X430C: External Interrupt Level Setup Register 3 (Itc_Elv3) - Epson S1C17001 Technical Manual

Cmos 16-bit single chip microcontroller
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6 INITERRUPT CONTROLLER

0x430c: External Interrupt Level Setup Register 3 (ITC_ELV3)

Register name Address
Bit
External
0x430c
D15–13 –
Interrupt Level
(16 bits)
D12
Setup Register 3
D11
(ITC_ELV3)
D10–8 EILV7[2:0]
D7–0 –
D[15:13] Reserved
D12
EITG7: PWM & Capture Timer Interrupt Trigger Mode Select Bit
Selects PWM & capture timer interrupt trigger mode. This should be set to 1 for the S1C17001.
1 (R/W): Level trigger mode
0 (R/W): Pulse trigger mode (default)
Refer to the ITC_ELV0 register (0x4306) EITG1 (D12) description.
D11
Reserved
D[10:8]
EILV7[2:0]: PWM & Capture Timer Interrupt Level Bits
Set the PWM & capture timer interrupt level (0 to 7). (Default: 0)
Refer to the ITC_ELV0 register (0x4306) EILV1[2:0] (D[10:8]) description.
D[7:0]
Reserved
48
Name
Function
reserved
EITG7
T16E interrupt trigger mode
reserved
T16E interrupt level
reserved
Setting
1 Level
0 Pulse
0 to 7
EPSON
Init. R/W
Remarks
0 when being read.
0
R/W Be sure to set to 1.
0 when being read.
0x0 R/W
0 when being read.
S1C17001 TECHNICAL MANUAL

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