14 8-Bit Osc1 Timer (T8Osc1); 8-Bit Osc1 Timer Overview - Epson S1C17001 Technical Manual

14 8-bit OSC1 Timer (T8OSC1)

14.1 8-bit OSC1 Timer Overview

The S1C17001 incorporates a single-channel 8-bit OSC1 timer that uses the OSC1 clock as its oscillation source.
Figure 14.1.1 illustrates the 8-bit OSC1 timer configuration.
OSC
Division ratio selection
OSC1 oscillator/
Gate
division circuit
OSC1-1/1 to 1/32
To ITC
The 8-bit OSC1 timer includes an 8-bit up-counter (T8OSC1_CNT register) and 8-bit compare data register
(T8OSC1_CMP register).
The 8-bit counter can be reset to 0 by software and counts up using the OSC1 division clock (OSC1-1/1 to
OSC1-1/32). The count value can be read by software.
The compare data register contains the data for comparisons against the up counter contents. The comparator out-
puts a signal to control interrupts if the counter value matches the contents of the compare data register. This means
the compare data register can be used to program the interrupt occurrence cycle.
S1C17001 TECHNICAL MANUAL
T8ORST
Timer reset
RUN/STOP control T8ORUN
Count mode
T8ORMD
selection
Compare match interrupt request
Figure 14.1.1: 8-bit OSC1 timer configuration
EPSON
14 8-BIT OSC1 TIMER (T8OSC1)
Compare data register
Compare
match
Count
signal
control
circuit
T8OIE Interrupt enable
Interrupt
control circuit
8-bit OSC1 timer
T8OSC1_CMP
Comparator
Up counter
T8OSC1_CNT
161