Xilinx LogiCORE IP AXI Product Manual page 66

For further details, see:
• "Working with IP" and "Customizing IP for the Design" in the Vivado Design Suite User
Guide: Designing with IP (UG896)
• "Working with the Vivado IDE" section in the Vivado Design Suite User Guide: Getting
Started (UG910)
Figures in this chapter are illustrations of the Vivado Integrated Design Environment (IDE).
Note:
This layout might vary from the current version.
Customizing the Core
The AXI Bridge for PCI Express core customization parameters are described in the
following sections.
Basic Parameter Settings
The initial customization screen shown in
for the core, including the component name, reference clock frequency, and silicon type.
X-Ref Target - Figure 4-1
AXI Bridge for PCI Express v2.4
PG055 June 4, 2014
[Ref 9].
[Ref 8].
Figure 4-1
Figure 4-1: Basic Parameter Settings
www.xilinx.com
Chapter 4: Design Flow Steps
is used to define the basic parameters
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