Xilinx LogiCORE Manuals

Manuals and User Guides for Xilinx LogiCORE. We have 1 Xilinx LogiCORE manual available for free PDF download: Getting Started Manual

Xilinx LogiCORE Getting Started Manual (52 pages)

Ethernet 1000BASE-X PCS/PMA or SGMII v7.0

Brand: Xilinx | Category: Network Card | Size: 0.41 MB

Schedule of Figures

7
- Table of Contents
  5
Preface: about this Guide

9
- Guide Contents
  
  9
- Additional Resources
  
  9
- Conventions
  
  10
  - Typographical
    10
  - Online Document
    11
Chapter 1: Introduction

13
- About the Core
  
  13
- Recommended Design Experience
  
  13
- Additional Core Resources
  
  13
- Technical Support
  
  14
- Feedback
  
  14
  - Ethernet 1000BASE-X PCS/PMA or SGMII Core
    14
  - Document
    14
Chapter 2: Installing and Licensing the Core

15
- System Requirements
  
  15
- Before You Begin
  
  15
- Installing the Core
  
  15
  - CORE Generator IP Updates Installer
    16
  - Manual Installation
    16
- Verifying the Installation
  
  17
- License Options
  
  17
  - Simulation Only
    18
  - Full
    18
- Obtaining Your License
  
  18
- Installing the License File
  
  18
Chapter 3: Quick Start Example Design

19
- Overview
  
  19
- Generating the Core
  
  20
- Implementing the Example Design
  
  21
- Simulating the Example Design
  
  21
  - Setting up for Simulation
    21
  - Functional Simulation
    21
  - Timing Simulation
    22
- What's Next
  
  22
Chapter 4 : Detailed Example Design

23
- Directory Structure and File Descriptions
  
  23
  - VHDL Design Entry
    23
  - Verilog Design Entry
    27
- Implementation Scripts
  
  30
- Simulation Scripts
  
  30
  - Functional Simulation
    30
  - Timing Simulation
    31
- Core Example Design Using Rocketio
  
  32
  - Top-Level HDL
    32
  - Transceiver
    33
  - Transmitter Elastic Buffer
    33
- Demonstration Test Bench
  
  34
  - Customizing the Test Bench
    35
- Core Example Design with Ten-Bit Interface
  
  36
- SGMII Example Design / Dynamic Switching Example Design
  
  40
  - Example Design Top-Level HDL
    40
  - SGMII Adaptation Module
    41
  - Transceiver
    41
    
    Figure 4-8: SGMII Adaptation Module
    
    42
    
    Figure 4-11: Receiver Rate Adaptation Module Data Sampling
    
    48
    
    Customizing the Test Bench
    49
    
    Customizing the Test Bench
    50
  - Clock Generation
    43
  - Johnson Counter
    44
  - Transmitter Rate Adaptation Module
    45
  - Receiver Rate Adaptation Module
    46
  - Demonstration Test Bench
    48

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Motherboard Computer Hardware Transceiver Microcontrollers Controller

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Xilinx LogiCORE Manuals

Xilinx LogiCORE Getting Started Manual (52 pages)

Table of Contents

Schedule of Figures

Preface: about this Guide

Guide Contents

Additional Resources

Conventions

Chapter 1: Introduction

About the Core

Recommended Design Experience

Additional Core Resources

Technical Support

Feedback

Chapter 2: Installing and Licensing the Core

System Requirements

Before You Begin

Installing the Core

Verifying the Installation

License Options

Obtaining Your License

Installing the License File

Chapter 3: Quick Start Example Design

Overview

Generating the Core

Implementing the Example Design

Simulating the Example Design

What's Next

Chapter 4 : Detailed Example Design

Directory Structure and File Descriptions

Implementation Scripts

Simulation Scripts

Core Example Design Using Rocketio

Demonstration Test Bench

Core Example Design with Ten-Bit Interface

SGMII Example Design / Dynamic Switching Example Design

Figure 4-8: SGMII Adaptation Module

Figure 4-11: Receiver Rate Adaptation Module Data Sampling

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