Xilinx LogiCORE IP AXI Product Manual page 82

Vivado Simulator
By defaults, the simulator is set to Vivado simulator. To run a simulation, click Run
Behavioral Simulation in the Flow Navigator.
Cadence IES
For a Cadence IES simulation, the following steps are required:
1. Run the following command in Vivado Tcl console of the example project to create an
IES environment:
export_simulation -lib_map_path /proj/xbuilds/2013.3_daily_latest/clibs/ius/
12.20.016/lin64/lib/ -simulator ies -directory ncsim
2. Go to ncsim directory on the terminal, and run the ./board_sim_ies.sh command.
Mentor Graphics Questa SIM
For a Questa SIM simulation, the following steps are required:
1. In the Vivado IDE, change the simulation settings as follows:
Target simulator: QuestaSim/ModelSim
°
2. On the Simulator tab, select Run Simulation > Run behavioral simulation.
VCS Simulator
For a VCS simulation, the following steps are required:
1. In the Vivado Tcl console, enter set_param
ips.useProjectLanguageSubcoreFileDiscovery "true"
2. In the Vivado Sources Tab, select AXI_BRAM_CTRL IP > Reset Output Products >
Generate Output Products.
3. Run the following command in Vivado Tcl console of the example project to create a VCS
environment:
export_simulation -lib_map_path /proj/xbuilds/2014.1_daily_latest/clibs/vcs/
H-2013.06-3/lin64/lib/ -simulator vcs_mx -force -directory vcs_mx
4. Go to the vcs_mx directory on the terminal, and run the ./board_sim_vcs_mx.sh
command.
Simulation is not supported for configurations with the Silicon Revision option set to IES.
IMPORTANT:
Only implementation is supported.
AXI Bridge for PCI Express v2.4
PG055 June 4, 2014
www.xilinx.com
Chapter 5: Example Design
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