Chapter 4: Design Flow Steps; Customizing And Generating The Core - Xilinx LogiCORE IP AXI Product Manual

Design Flow Steps
This chapter describes customizing and generating the core, constraining the core, and the
simulation, synthesis and implementation steps that are specific to this IP core. More
detailed information about the standard design flows in the Vivado® IP Integrator can be
found in the following Vivado Design Suite user guides:
• Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
[Ref 12]
• Vivado Design Suite User Guide: Designing with IP (UG896)
• Vivado Design Suite User Guide: Getting Started (UG910)
• Vivado Design Suite User Guide: Logic Simulation (UG900)

Customizing and Generating the Core

This section includes information about using the Vivado Design Suite to customize and
generate the core.
If you are customizing and generating the core in the Vivado IP Integrator, see the Vivado
Note:
Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
information. IP Integrator might auto-compute certain configuration values when validating or
generating the design. To check whether the values do change, see the description of the parameter
in this chapter. To view the parameter value you can run the validate_bd_design command in
the Tcl Console.
You can customize the IP for use in your design by specifying values for the various
parameters associated with the IP core using the following steps:
1. Select the IP from the IP catalog.
2. Double-click the selected IP, or select the Customize IP command from the toolbar or
right-click menu.
AXI Bridge for PCI Express v2.4
PG055 June 4, 2014
www.xilinx.com
Chapter 4
[Ref 9]
[Ref 8]
[Ref 10]
[Ref 12] for detailed
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