Parameter Dependencies - Xilinx LogiCORE IP AXI Product Manual

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Table 2-4: Top-Level Parameters (Cont'd)
Generic
Parameter Name
NUM_READ_
G58
OUTSTANDING
NUM_WRITE_
G59
OUTSTANDING
NUM_READ_
G60
OUTSTANDING
Notes:
1. This is a 32-bit address.
2. The width of this should match the address size (C_AXIBAR_AS) for this BAR.
3. The range specified must comprise a complete, contiguous power of two range, such that the range = 2
significant bits of the Base Address are zero. The address value is a 32-bit AXI address.
4. The difference between C_AXIBAR_n and C_AXIBAR_HIGHADDR_n must be less than or equal to 0x7FFF_FFFF and greater
than or equal to 0x0000_1FFF.
5. It is recommended that you do not edit these default values on the AXI bridge for PCIe IP unless you need to reduce the
resource utilization. Doing so impacts the AXI bridge performance.

Parameter Dependencies

Table 2-5
lists the parameter dependencies.
Table 2-5: Parameter Dependencies
Generic
Parameter
G1
C_FAMILY
G2
C_INCLUDE_RC
G3
C_COMP_TIMEOUT
AXI Bridge for PCI Express v2.4
PG055 June 4, 2014
Description
1: Only one active AXI
ARADDR can be accepted
in AXI slave bridge PCIe.
2, 4, 8: Size of pipeline for
active AXI ARADDR values
AXI Interconnect
to be stored in AXI slave
Slave Port Read
bridge PCIe
Pipeline Depth
A value of 8 is not allowed
for 128-bit core (Gen2 7
series) configurations. The
maximum setting of this
parameter value is 4.
AXI4 Master Interconnect Parameters
1, 2, 4: Number of actively
AXI Interconnect
issued AXI AWADDR
Master Bridge write
values on the AXI
address issue depth
Interconnect to the target
slave device(s).
1, 2, 4: Number of actively
AXI Interconnect
issued AXI ARADDR values
Master Bridge read
on the AXI Interconnect to
address issue depth
the target slave device(s).
Affects
Bridge Parameters
G2, G41,
G49,
G55
www.xilinx.com
Chapter 2: Product Specification
Allowable Values
Default Value VHDL Type
Depends
Description
G1
Meaningful only if G1 = Kintex-7.
8
Integer
4
Integer
4
Integer
n
and the n least
22
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