Xilinx LogiCORE IP AXI Product Manual page 64

Configuration Transaction Timeout
Configuration transactions are non-posted transactions. The AXI Bridge for PCI Express core
has a timer for timeout termination of configuration transactions that have not completed
on the PCIe link. SLVERR is returned when a configuration timeout occurs. Timeout of
configuration transactions are flagged by an interrupt as well.
Abnormal Configuration Transaction Termination Responses
Responses on AXI4-Lite to abnormal terminations to configuration transactions are shown
in Table 3-8.
Table 3-8: Responses of AXI Bridge for PCI Express to Abnormal Configuration Terminations
Transfer Type Abnormal Condition
Bus number not in the range of primary bus
Config Read or Write
number through subordinate bus number
Config Read or Write Valid bus number and completion timeout occurs
Config Read or Write Device number not zero
Config Read or Write Completion timeout
Bus number in the range of secondary bus number
Config Write through subordinate bus number and UR is
returned.
AXI Bridge for PCI Express v2.4
PG055 June 4, 2014
www.xilinx.com
Chapter 3: Designing with the Core
Bridge Response
SLVERR response is asserted
SLVERR response is asserted
SLVERR response is asserted
SLVERR response is asserted
SLVERR response is asserted
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