Debug Tools - Xilinx LogiCORE IP AXI Product Manual

Debug Tools

There are many tools available to address AXI Bridge for PCI Express design issues. It is
important to know which tools are useful for debugging various situations.
Vivado Lab Tool
Vivado® lab tools inserts logic analyzer (ILA) and virtual I/O (VIO) cores directly into your
design. Vivado lab tools also allow you to set trigger conditions to capture application and
integrated block port signals in hardware. Captured signals can then be analyzed. This
feature in the Vivado IDE is used for logic debugging and validation of a design running in
Xilinx devices.
The Vivado logic analyzer is used to interact with the logic debug LogiCORE IP cores,
including:
• ILA 2.0 (and later versions)
• VIO 2.0 (and later versions)
See Vivado Design Suite User Guide: Programming and Debugging (UG908)
Reference Boards
Various Xilinx development boards support the AXI Bridge for PCI Express core. These
boards can be used to prototype designs and establish that the core can communicate with
the system.
• 7 series evaluation boards
KC705
°
VC707
°
ZC706
°
AXI Bridge for PCI Express v2.4
PG055 June 4, 2014
www.xilinx.com
Appendix B: Debugging
[Ref 11].
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