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Implementation Design Overview
For implementation design, the AXI-BRAM controller can be used as a scratch pad memory
to write and read to Block RAM locations.
Example Design Elements
The core wrapper includes:
•
An example Verilog HDL or VHDL wrapper (instantiates the cores and example design).
•
A customizable demonstration test bench to simulate the example design.
Example Design Output Structure
Figure 5-2
provides the output structure of the example design.
AXI Bridge for PCI Express v2.4
PG055 June 4, 2014
www.xilinx.com
Chapter 5: Example Design
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