Xilinx LogiCORE IP AXI Product Manual page 23

Table 2-5: Parameter Dependencies (Cont'd)
Generic Parameter
G4 C_INCLUDE_BAROFFSET_REG
C_SUPPORTS_NARROW_
G5
BURST
G6 C_AXIBAR_NUM
G7 C_AXIBAR_0
G8 C_AXIBAR_HIGHADDR_0
G9 C_AXIBAR_AS_0
G10 C_AXIBAR2PCIEBAR_0
G11 C_AXIBAR_1
G12 C_AXIBAR_HIGHADDR_1
G13 C_AXIBAR_AS_1
G14 C_AXIBAR2PCIEBAR_1
G15 C_AXIBAR_2
G16 C_AXIBAR_HIGHADDR_2
G17 C_AXIBAR_AS_2
G18 C_AXIBAR2PCIEBAR_2
G19 C_AXIBAR_3
G20 C_AXIBAR_HIGHADDR_3
AXI Bridge for PCI Express v2.4
PG055 June 4, 2014
Affects Depends
G10,
G14,
G18, G6
G22,
G26, G30
G4, G7 -
G30
G8 G6, G8
G7 G6, G7
G6
G4, G6
G12 G12
G11 G6, G11
G6
G4, G6
G16 G16
G15 G6, G15
G6
G4, G6
G20 G20
G19 G6, G19
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Chapter 2: Product Specification
Description
If G4 = 0, then G10, G14, G18, G22,
G26 and G30 have no meaning. The
number of registers included is set
by G6.
If G6 = 1, then G7 - G10 are enabled.
If G6 = 2, then G7 - G14 are enabled.
If G6 = 3, then G7 - G18 are enabled.
If G6 = 4, then G7 - G22 are enabled.
If G6 = 5, then G7 - G26 are enabled.
If G6 = 6, then G7 - G30 are enabled.
G7 and G8 define the range in AXI
memory space that is responded to
by this device (AXIBAR)
G7 and G8 define the range in AXI
memory space that is responded to
by this device (AXIBAR)
Meaningful when G4 = 1.
G11 and G12 define the range in
AXI-memory space that is responded
to by this device (AXIBAR)
G11 and G12 define the range in
AXI-memory space that is responded
to by this device (AXIBAR)
Meaningful when G4 = 1.
G15 and G16 define the range in
AXI-memory space that is responded
to by this device (AXIBAR)
G15 and G16 define the range in
AXI-memory space that is responded
to by this device (AXIBAR)
Meaningful when G4 = 1.
G19 and G20 define the range in
AXI-memory space that is responded
to by this device (AXIBAR)
G19 and G20 define the range in
AXI-memory space that is responded
to by this device (AXIBAR)
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