HP StorageWorks 2/64 - Core Switch Command Reference Manual page 74
Hp storageworks fabric os 5.x command reference guide (aa-rvhvb-te, september 2005)
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Also See for StorageWorks 2/64 - Core Switch:
- Reference manual (278 pages) ,
- Installation manual (166 pages) ,
- Administrator's manual (152 pages)
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• Port 0 reads the central memory in ASIC 0.
• Port 1 reads the central memory in ASIC 0.
• Port 14 reads the central memory in ASIC 0.
• Port 15 reads the central memory in ASIC 0.
• Port 0 reads the central memory in ASIC 1.
• Port 1 reads the central memory in ASIC 1.
• Port 14 reads the central memory in ASIC 1.
• Port 15 reads the central memory in ASIC 1.
• Port 15 reads the central memory in ASIC 2.
• Port 15 reads the central memory in ASIC 3.
3.
Repeat
step 1
4.
Repeat this procedure for each ASIC pair in the blade under test.
The pattern used is generated similarly as in data read/write subtest except that only 2112 bytes are
generated.
Parity error subtest
The forced bad parity error subtest verifies that a bad parity can be detected, its error flag set, and
interrupt bits set.
The test method is as follows:
1.
Clear the error and interrupt bits of all ASICs.
2.
Write 64 bytes with bad parity to all ASICs at offset 0.
3.
Read each of the ASIC pairs at offset 0 and check that the error and interrupt bits are set.
4.
Repeat
step 1
Buffer number error subtest
The forced bad buffer number error subtest verifies that the bad buffer number in the data packet can be
detected and its error flag and interrupt bits set.
The test method is as follows:
1.
Clear the error and interrupt bits of all ASICs.
2.
Set up the hardware so that transmission of data includes a bad buffer.
3.
For each of the 11 possible offsets for each ASIC X in the switch:
a. Write a 64-byte pattern in the central memory.
b. Read X from all ASIC Y in the switch.
c. For ASIC X, ensure:
• Interrupt status bits are set.
• The error type is buffer number error.
• The port number in error is the receiver port (which is the base port of ASIC Y).
d. Check that all ASICs besides X are not interrupted or flagged with an error.
Reading the error register clears the CMEM interrupt bit, preparing for the next offset to test.
74
Fabric OS commands
and
step 2
for the complemented pattern.
through
step 3
for offset 1 through 10.
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