Spi Broadcast Mode; Added Spi Broadcast Mode Section And Figure 27; Renumbered Sequentially - Analog Devices ADRV9005 Reference Manual

Reference Manual ADRV9001
SERIAL-PERIPHERAL INTERFACE (SPI)
Serial Clock (SCLK)
SCLK is the serial interface reference clock driven by the baseband processor (uses the SPI_CLK pin). It is only active while CSB is low. The
maximum SCLK frequency is 45.45 MHz.
Chip Select Bar (CSB)
CSB is the active-low chip select that functions as the bus enable signal driven from the baseband processor to the device (uses the SPI_EN
pin). CSB is driven low before the first SCLK rising edge and is normally driven high again after the last SCLK falling edge. The device ignores
the clock and data signals while CSB is high. CSB also frames communication to and from the device and returns the SPI to the ready state
when it is driven high.
Forcing CSB high in the middle of a transaction stops part or all of the transaction. If the transaction stops before the instruction is complete
or in the middle of the first data-word, the whole transaction stops and the state machine returns to the ready state. Any complete data byte
transfers before CSB deserting are valid, but all subsequent transfers in a continuous SPI transaction stop.
Serial Data Input/Output and Serial Data Output (SDIO and SDO)
When configured as a 4-wire bus, the SPI uses two data signals: SDIO and SDO. SDIO is the data input line driven from the baseband
processor (uses the SPI_DIO pin) and SDO is the data output from the device to the baseband processor in this configuration (uses the
SPI_DO pin). When configured as a 3-wire bus, SDIO is used as a bidirectional data signal that both receives and transmits serial data. The
SDO port is disabled in this mode.
The data signals are launched on the falling edge of SCLK and sampled on the rising edge of SCLK by both the baseband processor and
the device. SDIO carries the control field from the baseband processor to the device during all transactions, and it carries the write data fields
during a write transaction. In a 3-wire SPI configuration, SDIO carries the returning read data fields from the device to the baseband processor
during a read transaction. In a 4-wire SPI configuration, SDO carries the returning data fields to the baseband processor.
The SDO and SDIO pins transition to a high-impedance state when the CSB input is high. The device does not provide any weak pullups or
pulldowns on these pins. When SDO is inactive, it is floated in a high-impedance state. If a valid logic state on SDO is required at all times, add
an external weak pullup/pulldown (10 kΩ value) on the PCB.

SPI BROADCAST MODE

Broadcast mode is used to initialize multiple ADRV9001 devices at the same time, in the initialization stage. . When SPI broadcast is not
enabled, multiple devices will be controlled in series where each device is controlled one at a time e.g. load the arm image on device one, then
on device two and so on. Broadcast mode allows the devices to be initialized in parallel, so each device is controlled at the same time e.g.
the arm image is loaded to all devices at the same time. This means that from the RESET to the CALIBRATED states, the devices will be all
controlled together.
The main advantage of this mode is to save time in multi ADRV9001 applications. Where N devices are all initialized using broadcast mode, the
time taken to initialize all the devices is reduced by a factor of N.
The expected hardware setup is similar to the Figure 27 with a 'main' device (BBIC) and 2+ 'subordinate' devices (ADRV9001) sharing common
clk + data lines. In broadcast mode, user would simultaneously activate all chip select lines and then send the data to all 'sub' devices at the
same time. This means that SPI is operating in write only mode and there will be no SPI reads. Since there is no readback from the devices
during broadcast mode, this is not recommended during the development/debug stage since readback is useful for debugging. Any readback or
verification per device can be done after the full broadcast initialization procedure has completed.
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