Analog Devices ADRV9005 Reference Manual page 18

Reference Manual
ADRV9001 EXAMPLE USE CASES
Table 4. Constraints and Limitations in a Single-Band 2T2R TDD Type Small-Cell Application (Continued)
Functionality Constraints and Limitations
RF Front End For LO generation, the ADRV9001 uses internal VCO that generates a square wave type signal. A square wave LO produces harmonics. For
example, depending on RF matching used on the RF ports, the second LO harmonic can be as high as −50 dBc, and the third harmonic can be
as high as −9 dBc. Therefore, the RF filtering on the receiver and transmitter path must ensure that signals at the LO harmonic frequencies (up to
ninth in some cases) do not affect overall system performance.
DPD The DPD functionality can be used in the 2T2R TDD mode. The ADRV9001 can perform the DPD operation or observation receiver data can
be sent to the baseband processor through the receiver data port during transmitting operation. The receiver path used during DPD operation to
perform transmitter observation is also used by the transmitter tracking calibrations. In case of external DPD, ensure that access to the receiver
path during transmitting slots is time-shared between the DPD operation and transmitter calibrations.
Calibrations
During the receiver initialization sequence, ensure there are no signals present at the receiver input (external LNA must be disabled) and
appropriate termination is present at the LNA output to avoid reflections of receiver calibration tones. During the transmitter initialization sequence,
ensure that the power amplifier is powered down to avoid unwanted emission of transmitter calibration tones at the antenna.
The ADRV9001 must access receiver datapath during transmitter time slots to operate the transmitter tracking calibration. If a user uses
transmitter observation path with DPD functionality performed by the baseband processor, then access to the receiver datapath during transmitter
slots must be time-shared between the DPD operation and transmitter calibrations.
AGPIOs Analog GPIOs (operating at 1.8 V level) can be used as read or write digital levels in the end user system. AGPIOs can be used to control the
states of external components or read back digital logic levels from the external components.
DGPIOs Digital GPIOs can be used to perform real-time monitoring of states of internal ADRV9001 blocks. Digital GPIOs operating as inputs control
receiver gain, transmitter attenuation, AGC operation, and other elements of the ADRV9001 transceiver. Depending on the ADRV9001 operation,
up to 4 GPIOs may be used by the data port interface.
AuxADC AuxADC can be used to monitor analog voltage (for example, a temperature sensor). The maximum AuxADC input voltage must not exceed 0.95
V.
AuxDAC AuxDAC can be used to control the VCXO responsible for generating the ADRV9001 device clock, generate a preconfigured ramp up/down signal
that can be used to control power amplifier bias, and control any circuitry that requires analog control voltage up to 1.75 V.
DEV_CLK_OUT The ADRV9001 provides a divided down version of the DEV_CLK reference clock input signal on the DEV_CLK_OUT output. This output is
intended to provide reference clock signal to the digital components in the overall system. This output can be configured to be active after power
up and before the ADRV9001 configuration stage.
Multichip Sync If there is no need for multichip synchronization, initialize the ADRV9001 using API functions only.
analog.com
ADRV9001
Rev. A | 18 of 377