Analog Devices ADRV9005 Reference Manual page 69

Reference Manual
DATA INTERFACE
Figure 39 shows the transmit CSSI (Tx) for 16-bit data symbols.
Receive CSSI with Two, Four, and Eight Times Data Clock Rates
The ADRV9001 receive CSSI supports two, four, or eight times of the data clock rate for some applications.
Figure 40, Figure 41, and Figure 42
The strobe pulse validates the start of the 32-bit I and Q samples, and the remaining data bits are ignored.
Figure 40. Receive CSSI Timing with 2 Times Data Clock Rate for 16-Bit I/Q Data Sample (MSB First), 32 Cycles
Figure 41. Receive CSSI Timing with 4 Times Data Clock Rate for 16-Bit I/Q Data Sample (MSB First), 96 Cycles
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Figure 38. Receive CSSI Timing for 16-Bit Symbols (MSB First)
Figure 39. Transmit CSSI Timing for 16-Bit Symbols (MSB First)
show the receive CSSI (Rx1 and Rx2) for 16-bit I/Q data sample with two, four, and eight times clock rates.
ADRV9001
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