Analog Devices ADRV9005 Reference Manual page 260

Reference Manual
GENERAL-PURPOSE INPUT/OUTPUT (GPIO) AND INTERRUPT CONFIGURATION
Set the transmitter attenuation control mode to "MODE_PIN" by the API function adi_adrv9001_Tx_AttenuationMode_Set(), and select the
appropriate GPIOs for each channel by the API function adi_adrv9001_Tx_Attenuation_PinControl_Configure(). The baseband processor
can send the pulses to the ADRV9001 through the specific digital GPIO pins to increase or decrease the transmitter attenuation.
Pin-Based Receiver Gain Control
The Receiver Gain Control section provides a complete description of the receiver gain control.
Pin-based receiver gain control is relevant for applications that require manual gain control (MGC) and precise timing for gain change events.
The pin-based control offers lower latency than SPI-based gain change operations. In pin-based gain control, certain digital GPIO pins are
assigned the "increment gain index" or "decrement gain index" functionality for a particular receiver channel. By applying a high pulse on
the assigned GPIO pin, the gain index for a specific channel is either increased or decreased, depending on the assigned functionality. The
pulse-width requirement is at least two system clock cycles (184.32 MHz in standard profiles) in the logic high state. Assign the increment and
decrement functionality to any digital GPIO from DGPIO_0 to DGPIO_15.
Note that for a programmed gain table that operates in a subset of the full gain table range (i.e., using index 195 to 255), once the gain Index
reaches the min/max gain index, the subsequent pin-based receiver gain control rising edge does not change the gain index.
Set the receiver gain control mode to "MODE_PIN" by the API adi_adrv9001_Rx_GainControl_Mode_Set(). Configure the appropriate digital
GPIO pins for the gain increase and decrease control and other control parameters by the API adi_adrv9001_Receiver_GainControl_Pin-
Mode_Configure(). Then, the baseband processor can send the pulses to the ADRV9001 through the specific digital GPIO pins to increase or
decrease the receiver gain index.
Power Amplifier Ramp Control
When the power amplifier ramp control function is used in the ADRV9001, an optional digital GPIO pin can be assigned as the "power amplifier
ramp control enable" functionality driven by the baseband processor. The rising edge of power amplifier ramp control enable with programmable
delay acts as the ramp up trigger signal, and the falling edge of power amplifier ramp enable with optional programmable delay as the ramp
down trigger signal.
The DPGIO assignment for the power amplifier ramp control can be set by the API adi_adrv9001_Tx_PaRamp_Configure().
Power Saving and Monitor Mode Control
The DPGIO can be used as the channel power saving, system power saving, and monitor mode enable signal. See the
Monitor Mode section for the details.
Enum ADI_ADRV9001_GPIO_SIGNAL_MON_ENABLE_SPS and ADI_ADRV9001_GPIO_SIGNAL_POWER_SAVING_CHANNEL1/
ADI_ADRV9001_GPIO_SIGNAL_POWER_SAVING_CHANNEL2 are for the DPGIO as system power saving/monitor mode and channel
power saving enable, respectively.
When the CPS and/or SPS/monitor mode is enabled, the BBIC can call the API adi_adrv9001_gpio_Configure() to set the power saving and
monitor mode control to enable signals on the DGPIOs.
Hopping Mode Control
Assign a DPGIO as a frequency hopping control signal. Also use the DGPIOs to choose the hop table index, receiver gain table index,
transmitter attenuation index, etc. See the
Set the hopping mode control GPIO functions through the API adi_adrv9001_fh_Configure().
Digital GPIO Output Features
Table 103 shows the available digital GPIO output features. The relative API automatically sets the GPIO I/O directions.
Table 103. Summary of Digital GPIO Output Features
Feature Description
Control Out Mux Allows a choice of Main/RX/TX control signals to output from the ADRV9001 to monitor the
status of the device.
analog.com
Frequency Hopping section for more details.
ADRV9001
Power Saving and
GPIO Pins Available for Feature
DGPIO_0 through DGPIO_11
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