Analog Devices ADRV9005 Reference Manual page 181

Reference Manual
RECEIVER GAIN CONTROL
Table 72. New Rx Gain Table Created from the Default Rx Gain Correction Table (Continued)
Total Effective
Gain Table ADRV9002 Attenuation
1
Index (dB)
193 21
194 20.5
195 30
196 29.5
197 29
... ...
253 1
254 0.5
255 0
1
This column is not part of the Rx Gain Table and included only for illustrative purposes.
The above example uses a receiver gain correction table. A similar algorithm applies to generate the new receiver gain compensation table
with only one difference: the digital gain also compensates the LNA attenuation in addition to the front end attenuation. Therefore, based on the
external gain control word setting, the digital gain is further adjusted.
Note that the LNA must be powered down for initial calibrations. Once it is configured or bypassed during the radio on operation, it cannot be
dynamically configured or bypassed.
It is recommended to use the external LNA gain control based on the default Rx gain table, as shown in the above example. However, the
ADRV9001 allows to define the minimum gain index in the default Rx gain table (for example, set the minimum gain index to be 211 instead
of 195) to accommodate the gain control requirements in the applications. The minimum gain index (minGainIndex) can be set in the LNA
configuration structure adi_adrv9001_RxLnaConfig_t.
As mentioned, two AGPIO pins are used for each receiver to perform external gain control. Depending on the hardware register setting,
the AGPIO pins for Receiver 1 and Receiver 2 are selected from AGPIO[3:0], AGPIO[7:4], and AGPIO[11:8].
of Receiver 1 and Receiver 2 external gain element control when AGPIO[0:3] is selected (note that it is also possible to use AGPIO[1:0]
for Receiver 2 and AGPIO[3:2] for Receiver 1). For more details, see the
section.
Table 73. An Example of Analog GPIOs for External Gain Element Control
Receiver
Rx1
Rx2
Enable these AGPIOs as outputs and set for external gain functionality. The programmed 2-bit value is directly related to the status of these
AGPIO pins. For example, if the external gain word of the Receiver 1 gain table is programmed to three in the selected gain index, then the
AGPIO[0] and AGPIO[1] are high if AGPIO[1:0] is used to control the external gain element, as the example shown in
See the Implement an External LNA in TES
analog.com
Total Effective
External Attenuation Front-End Attenuator
1
(dB) Control Word [7:0]
10 233 (copied from 213)
10 232 (copied from 214)
0 248
0 247
0 247
... ...
0 28
0 14
0 0
AGPIO Pins to Control External Gain Element
AGPIO[1:0]
AGPIO[3:2]
Figure 163. AGPIO Control of an External Gain Element to Rx1
section for details on how to implement external gain control in the TES.
TIA ADC External Gain
Control Control Control [1:0]
0 0 1
0 0 1
0 0 0
0 0 0
0 0 0
... ... ...
0 0 0
0 0 0
0 0 0
General-Purpose Input/Output (GPIO) and Interrupt Configuration
ADRV9001
Phase Digital Gain/Attenuator
Offset Control Word [10:0]
0 −20
0 −17
0 −2
0 −17
0 −7
... ...
0 −2
0 −1
0 0
Table 73 shows an example
Figure 163.
Rev. A | 181 of 377