Phase Synchronization - Analog Devices ADRV9005 Reference Manual

Reference Manual
MULTICHIP SYNCHRONIZATION
sampleDelay = Min (all MCS_to_Strobe latency) – 1
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readDelay = Max (all MCS_to_Strobe latency) - Min (all MCS_to_Strobe latency) + 4
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Receiver:
Each channel is independent from other channels.
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sampleDelay = UserDefined
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readDelay (LVDS Only) = UserDefined (minimum of 1 to compensate for clock timing in LVDS from analog, imposed by API)
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Syncing multiple channels: (for example, RX1 and RX2, or multiple devices)
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sampleDelay = UserDefined
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readDelay (LVDS Only) = UserDefined (minimum of 1 to compensate for clock timing in LVDS from analog, imposed by API)
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Once sample delay and read delay are calculated, set them by API adi_adrv9001_Mcs_ChannelMcsDelay_Set().
Note that the MCS_to_Strobe delay difference among the different channels should be within two samples.
Note on the receiver side, the functions to calculate sample delay and read delay are user defined. Use the default values provided in the
software. Analog Devices also allows an adjustment to use the above method. Fundamentally, this is controlled from the baseband processor,
and there is full control over how data is timed. In contrast, on the transmitter side, the ADRV9001 does not control how the data is passed in.
Therefore, it tries to adjust the different delays and aligns the data in time.

PHASE SYNCHRONIZATION

The following plots are trying to show the effect of the phase synchronization function. The test is done with two receiver signals coming from
the same signal source. The signal uses continuous waves (CW) tones. The reference clock frequency is set to 38.4 MHz. ADI uses the
LTE61.44 profile for this test. The test is run from 100 MHz to 3GHz with a 100 MHz step, using internal LOs. Analog Devices also used five
different ADRV9001 chips for the test.
Figure 93 shows the effect of phase synchronization for the receiving signals. The signals are captured at the interface to calculate phase error.
Figure 94 shows the phase error after synchronization of the two LOs, and these are internal register reads but should be accurate.
analog.com
Figure 93. Phase Error After Synchronization Between Two Receivers
ADRV9001
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