Multichip Synchronization; Introduction; Theory Of Operation - Analog Devices ADRV9005 Reference Manual

Reference Manual ADRV9001

MULTICHIP SYNCHRONIZATION

INTRODUCTION

MCS is needed when an application requires deterministic latency among datapaths within one ADRV9001 device or multiple ADRV9001
devices. For example, in MIMO applications, MCS is the solution to align the data in time for multiple channels. Some applications not only
require the delay to be deterministic but also require the phase to be the same. The ADRV9001 supports PLL phase synchronization in addition
to the deterministic delay.

THEORY OF OPERATION

Figure 86 illustrates the synchronization among multiple ADRV9001 devices using the MCS pin. The external clock chip (for example, AD9528)
generates the MCS signal using the device clock DEV_CLK, and each ADRV9001 device captures it using the negative or positive edge
of DEV_CLK to meet setup and hold time with good margins. Each ADRV9001 device uses this sampled MCS to synchronize all internally
generated clocks, which makes them align among all devices' internal clocks. Set the ADRV9001 MCS input port to the LVDS or CMOS mode.
Figure 86. Multichip Synchronization System Diagram
Sampled MCS
The ADRV9001 samples the MCS pulse signal internally by the DEV_CLK signal rising or falling edge. Figure 87 shows the example of an
MCS pulse sampled by the rising edge of the DEV_CLK. This process guarantees that the sampled MCS signal, which is used to synchronize
all ADRV9001 devices, is time aligned.
Figure 87. Sample MCS Signal at Rising Edge of DEV_CLK
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