Analog Devices ADRV9005 Reference Manual page 356

Reference Manual
ADRV9001 EVALUATION SYSTEM
Table 131. TDD Signals
Signal
RX1 Pin
TX1 Pin
RX2 Pin
TX2 Pin
ORX1 Pin
ORX2 Pin
RX1 DMA
RX2 DMA
TX1 DMA
TX2 DMA
ORX1 DMA
ORX2 DMA
RX1 DMA Trigger
RX2 DMA Trigger
TX1 DMA Trigger
TX2 DMA Trigger
ORX1 DMA Trigger
ORX2 DMA Trigger
SMA1 Trigger
SMA2 Trigger
General-Purpose 1/ Hop Pin
General-Purpose 2 to 6
Figure 344 shows a loaded sample JSON file with DMR settings. The parameters appear in the table for the receiver enable (Rx1 Pin) and
DMA signals. In this example, the frame length is 12000000 clock cycles (60 ms). Both signals' primary assert happens at the beginning of the
frame and then drops on the 6000000 clock cycle (30 ms). The frame then repeats itself on selecting the Repeat one frame forever.
Enabling the Tx1 DMA sends data from the FPGA to SSI. Disabling the Tx1 DMA stops sending data from the FPGA to SSI. It works together
with the Tx_interface enabling/disabling (accepting data from SSI at the ADRV9001) to provide more flexibility to control what data to transmit.
For example, there are four different scenarios:
DMA disabled, Tx_interface disabled: nothing is transmitted.
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Figure 346. TDD Frame Timing Illustration
Description
These signals are hardwired to the RX/TX ENABLE pins (used as SETUP signals in FH).
Use as the ORX enable signal when routed to the GPIO assigned as ORX control.
The DMA enables the gate data transfer for each channel.
Configure these signals as triggers for the DMAs to signify that data transfer on the channel must only occur when
the trigger signal has pulsed high followed by the DMA signal for the channel going high.
Hardwired to dedicated SMA (J67) on the ZC706 board, use this signal to trigger the external equipment. No option
on the ZCU102 currently.
Hardwired to dedicated SMA (J68) on the ZC706 board, use this signal to trigger the external equipment. No option
on the ZCU102 currently.
General purpose signal that can be routed to GPIO pins. Also used as the Hop Pin in the FH mode.
General purpose signals that can be routed to GPIO pins as needed.
ADRV9001
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