Analog Devices ADRV9005 Reference Manual page 310

Reference Manual
POWER-SUPPLY RECOMMENDATIONS
Table 124. Power-Supply Pins and Functions (Continued)
Pin No. Type Pin Name
G10 ANALOG VAUXVCO_1P3
G12 ANALOG VTX1LO_1P3
H2 ANALOG VANA2_1P8
H3 ANALOG VTX2LO_1P0
H5 ANALOG VCLKVCO_1P0
H7 ANALOG VCONV_1P0
H8 ANALOG VCONV_1P3
H10 ANALOG VAUXVCO_1P0
H12 ANALOG VTX1LO_1P0
H13 ANALOG VANA1_1P8
K4 ANALOG VSSA/TESTCK+
K5 ANALOG VSSA/TESTCK-
L7, L8 DIGITAL VDIG_1P0
M7 DIGITAL VDIGIO_1P8
M8 DIGITAL VDIG_0P9
N7, N8, P1, P14 DIGITAL VSSD
Power-Supply Architecture
Figure 295 outlines the power-supply configuration used on the ADRV9001 evaluation board. This configuration follows the recommendations
outlined in Table 124. This diagram includes the use of C/FB/C/FB cascaded filters and FBs for additional RF isolation. The use of FBs and 0 Ω
resistors in the EVB power-supply solution accomplishes the following three goals.
Serves as placeholders for FBs or other filter devices if RF noise problems are encountered in the application and for additional isolation. For
►
more details to select the FB, see the
Ensures to follow the power routing recommendations outlined in the
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resistor placeholders in series force the use of separate traces to deliver different power domains to the ADRV9001 device.
Provides a place in the circuit to monitor and measure the current for debugging. For this case, replace the 0 Ω components or FB with very
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low-impedance shunt resistors and measure the voltage to determine current to the specified input ball.
For more details on exact power supply implementation, refer to the ADRV9001 customer evaluation board schematic supplied with an
evaluation kit.
The ADRV9001 evaluation board also provides an on-board current and voltage sensor (ADM1293), which monitors and reports back the
power consumed by the transceiver in the selected mode of operation. The intent is to provide live feedback from an evaluation system on the
real-time power consumption. Current readbacks from these sensors are accurate within 2.5% tolerance. If using these readback numbers to
estimate the overall power for the power supply design, add an extra power margin to accommodate dynamic conditions. The first paragraph in
this section provides more suggestions.
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Voltage [V] Description
1.3 1.3 V internal LDO input supply for auxiliary LO VCO and LO generation circuitry. This pin is sensitive
to supply noise.
1.3/1.0 1.3 V internal LDO input supply for Tx1 LO buffers, upconverter, and LO delay. Provide 1.0 V supply to
this pin when internal LDO is not used. This pin is sensitive to supply noise.
1.8 1.8 V supply for Rx2 Mixer, Rx2 transimpedance amplifier (TIA), Tx2 Low-Pass Filter (LPF) and
Internal References.
1.0 1.0 V internal supply node for Tx2 LO buffers, upconverter, and LO delay. For normal operation, leave
this pin unconnected.
1.0 1.0 V internal supply node for clock LO VCO and LO generation circuitry. Bypass this pin with a 4.7 µF
capacitor.
1.0 1.0 V internal supply node for Rx ADCs and Tx DACs. Bypass this pin with a 4.7 µF capacitor.
1.3/1.0 1.3 V internal LDO input supply for Rx ADCs and Tx DACs. Provide 1.0 V supply to this pin when
internal LDO is not used. This pin is sensitive to supply noise.
1.0 1.0 V internal supply node for auxiliary LO VCO and LO generation circuitry. Bypass this pin with a 4.7
µF capacitor.
1.0 1.0 V internal supply node for Tx1 LO buffers, upconverter, and LO delay. For normal operation, leave
this pin unconnected.
1.8 1.8 V supply for Rx1 mixer, Rx1 transimpedance amplifier (TIA), Tx1 low-pass filter (LPF), Xtal
oscillator, DEV_CLK circuitry, and internal references.
0 Connect to VSSA for normal operation.
0 Connect to VSSA for normal operation.
1.0 1.0 V digital core. Connect Pin L7 and Pin L8 together. Use a wide trace to connect to a separate
power-supply domain. Provide reservoir capacitance close to the chip.
1.8 1.8 V supply input for data port interface (CMOS-SSI/LVDS-SSI), SPI signals, control input/output
signals, and DGPIO interface.
0.9 0.9 V internal supply node for digital circuitry. Bypass this pin with a 4.7 µF capacitor.
0 Digital supply voltage (V
RF and Clock Synthesizer Supplies
)
SS
section.
Printed Circuit Board Layout Recommendations
ADRV9001
section. The FBs and
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