Renesas R-IN32M3 Series User Manual page 36

R-IN32M3-EC User's Manual
2.1.16 System Pins
Pin Name I/O
XT1 I
XT2 I/O
RESETZ I
PONRZ I
OSCTH I
JTAGSEL I
RSTOUTZ O
PLL_VDD -
PLL_GND -
VDD33 -
VDD10 -
GND -
LX O
EXTRES -
P0VDDARXTX -
P1VDDARXTX -
VDDACB -
AGND -
VDD15 -
VDDAPLL -
VSSAPLLCB -
VDD33ESD -
AVDD_REG -
AGND_REG -
BVDD -
BGND -
FB I
VDDQ_PECL_B0 -
VDDQ_PECL_B1 -
R18UZ0003EJ0501
Jan. 12, 2021
Function
Clock input pins
OSCTH = 1: Oscillator is in use.
XT1 and XT2 are respectively connected to GND
and oscillator.
OSCTH = 0: Resonator is in use.
XT1 and XT2 are connected to resonator
Reset input
Power on reset input
External clock input mode setting
0: Resonator using mode
1: External clock input mode
JTAG pin operating mode setting
0: Cortex-M3 JTAG mode
1: B-SCAN JTAG mode
External reset output
PLL power supply (1.0 V)
PLL ground level (GND)
I/O power supply (3.3 V)
Internal power supply (1.0 V)
Ground level (GND)
1.5-V output for on-chip regulator
Reference resistor connecting pin for on-chip PHY
Analog power supply for Rx/Tx pin (1.5 V) - port 0
Analog power supply for Rx/Tx pin (1.5 V) - port 1
Analog power supply for on-chip PHY (3.3 V)
Analog ground level for on-chip PHY (GND)
I/O power supply for on-chip PHY (1.5 V)
Analog core power supply for on-chip PHY (1.5V)
Analog core ground level for on-chip PHY (GND)
Analog test power supply for on-chip PHY (3.3 V)
Analog power supply for on-chip regulator (3.3 V)
Analog ground level for on-chip regulator (GND)
Power supply for on-chip regulator (3.3 V)
Ground level for on-chip regulator (GND)
Feedback input for on-chip regulator
PECL buffer power supply (3.3 V)
PECL buffer power supply (3.3 V)
2. Pin Functions
Level during & after
Active Reset
- -
- -
Low -
Low -
High -
- -
Low Low (after reset:
High)
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
- -
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