Page 1 All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics Corp. without notice. Please review the latest information published by Renesas Electronics Corp. through various means, including the Renesas Electronics Corp.
Page 2 Electronics product for any application for which it is not intended. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for which the product is not intended by Renesas Electronics.
Page 3 Instructions for the use of product In this section, the precautions are described for over whole of CMOS device. Please refer to this manual about individual precaution. When there is a mention unlike the text of this manual, a mention of the text takes first priority. 1.Handling of Unused Pins Handle unused pins in accord with the directions given under Handling of Unused Pins in the manual.
Page 4 R-IN32M3 Series Datasheet R18DS0008EJ**** R-IN32M3-EC User’s Manual R18UZ0003EJ**** R-IN32M3 Series User’s Manual (Peripheral Modules) R18UZ0007EJ**** R-IN32M3 Series Programming Manual (OS edition) R18UZ0011EJ**** R-IN32M3 Series Programming Manual (Driver edition) R18UZ0009EJ**** R-IN32M3 Series User’s Manual (Board design edition) R18UZ0021EJ**** R-IN32M3-CL User’s Manual This manual...
Page 5 2. Notation of Numbers and Symbols Weight in data notation: Left is high-order column, right is low-order column Active low notation: xxxZ (capital letter Z after pin name or signal name) or xxx_N (capital letter _N after pin name or signal name) or xxnx (pin name or signal name contains small letter n) Note: Explanation of (Note) in the text...
Page 6 Contents Overview ................................ 1 Introduction................................. 1 Overview ................................2 Internal Block Diagram ............................4 Pin Assignments (Top View) ..........................5 Base Addresses of the System Registers Area <R> .................... 6 Pin Functions ..............................7 List of Pins ................................8 2.1.1 Ethernet Pins ..............................
Page 7 2.5.2 External Memory/MCU Interface Pins ....................37 2.5.3 External Interrupt Input Pins ........................37 2.5.4 System Pins .............................. 37 2.5.5 Test Pins ..............................38 2.5.6 Port Pins ..............................39 2.5.7 Operating Mode Setting Pins ........................40 2.5.8 CC-Link IE Field Pin (Intelligent Device Station) .................. 40 2.5.9 CC-Link Pin (Intelligent Device Station, Remote Device Station) ............
Page 8 7.5.2 Port 1 Buffer Switching Registers (DRCTLP1L, DRCTLP1H) .............. 91 7.5.3 Port 2 Buffer Switching Registers (DRCTLP2L, DRCTLP2H) .............. 92 7.5.4 Port 3 Buffer Switching Registers (DRCTLP3L, DRCTLP3H) .............. 93 7.5.5 Port 4 Buffer Switching Registers (DRCTLP4L, DRCTLP4H) .............. 94 7.5.6 Port 5 Buffer Switching Registers (DRCTLP5L, DRCTLP5H) ..............
Page 9 Contents of Figures Figure 3.1 Memory Map (All) ..........................41 Figure 3.2 Memory Map (APB Peripheral Registers Area) ................. 42 Figure 3.3 Memory Map (External Memory Area) ....................43 Figure 3.4 Memory Map (CC-Link Master Area) ....................43 Figure 3.5 External MCU Interface Area ......................
Page 10 Contents of Tables Table 1.1 Overview of R-IN32M3-CL ........................2 Table 2.1 Meanings of the Items in the List of Pins ....................7 Table 2.2 Meanings of the Symbols and Abbreviations in the List of Pins .............. 7 Table 2.3 Operating Mode Setting Pins for which the Settings can be Checked ............
Page 11 These requirements are not necessarily met by traditional methods such as hard-wired Ethernet processors or dedicated high-speed CPUs. Renesas R-IN32M3-CL of large-scale integrated circuits (LSI) are specifically tailored to meet the demands of industrial Ethernet applications. Key features include: ®...
Page 12 R-IN32M3-CL User’s Manual 1. Overview Overview Table 1.1 Overview of R-IN32M3-CL (1/2) Product Item R-IN32M3-CL CPU cores Arm Cortex-M3 32-bit RISC CPU + Real-Time OS Accelerator (Hardware Real-Time OS, HW-RTOS) Operating frequency 100 MHz ® Instruction set Thumb -2 instruction Arm v7-M architecture Instruction RAM 768 Kbytes (RAM with ECC)
Page 13 R-IN32M3-CL User’s Manual 1. Overview (2/2) Product Item R-IN32M3-CL Internal peripheral circuit Watchdog timer - 1 channel - Software-triggered start mode - Selectable operations in response to errors: - Generation of a non-maskable interrupt (NMIZ) - Generation of a reset Asynchronous serial interface - 2 channels - Full duplex...
Page 14 R-IN32M3-CL User’s Manual 1. Overview Internal Block Diagram Timer Array UART × 2ch I2C × 2ch CAN × 2ch CSI × 2ch R18UZ0005EJ0400 Page 4 of 104 Dec. 28, 2018...
Page 15 R-IN32M3-CL User’s Manual 1. Overview Pin Assignments (Top View) R18UZ0005EJ0400 Page 5 of 104 Dec. 28, 2018...
Page 16 R-IN32M3-CL User’s Manual 1. Overview Base Addresses of the System Registers Area <R> The addresses of registers given in the subsequent sections are relative to the base addresses. In access to the registers via the external MCU interface, the base address is D_0000H. In access by the internal CPU or DMA controller, the base address is 4001_0000H.
Page 17 Level after reset indicates the pin state directly after the transition to RSTOUTZ = high. For details on the reset specifications, see the R-IN32M3 Series User’s Manual (Peripheral Modules). Table 2.2 Meanings of the Symbols and Abbreviations in the List of Pins...
Page 18 Hi-Z Note: The driving ability can be switched by the setting of the ETHDRCTRL register. For details, see section 7.3.3.2, Ethernet Interface Buffer Function Select Register (ETHDRCTRL), in the R-IN32M3 Series User’s Manual (Peripheral Modules). R18UZ0005EJ0400 Page 8 of 104...
Page 19 R-IN32M3-CL User’s Manual 2. Pin Functions (2) Other Pins Level Level Shared during after Pin Name Function Port Active Reset Reset PHYLINK0, PHY Link port (for EtherSwitch) P06-P07 High Hi-Z (High) PHYLINK1 ETHSWSECOUT EtherSwitch event output per second High (output pulses have a width of 2 cycles of HCLK) R18UZ0005EJ0400 Page 9 of 104...
Page 20 R-IN32M3-CL User’s Manual 2. Pin Functions 2.1.2 External Memory Interface Pins Level during Level after Pin Name Function Shared Pin Shared Port Active Reset Reset BUSCLK Bus clock output Clock output CSZ0 Chip select signal HCSZ Hi-Z (High) High output CSZ1 HPGCSZ Hi-Z (High)
Page 21 R-IN32M3-CL User’s Manual 2. Pin Functions 2.1.3 External MCU Interface Pins Level during & after Pin Name Function Shared Pin Shared Port Active Reset HBUSCLK Bus clock input for host INTPZ11 Hi-Z (High) HCSZ Chip select signal input CSZ0 HPGCSZ Page ROM mode chip CSZ1 select input...
Page 22 R-IN32M3-CL User’s Manual 2. Pin Functions 2.1.4 Port Pins and Real-Time Port Pins The ports and pins are configured as 12 sets of 8-bit ports. They are accessible in 32-bit units by grouping sets of 4 ports; i.e. ports 0 to 3, ports 4 to 7, and real-time ports 0 to 3. (1/4) Level during &...
Page 23 R-IN32M3-CL User’s Manual 2. Pin Functions (2/4) Level during & after Name Mode 1 Mode 2 Mode 3 Mode 4 Reset RXD1 Hi-Z (High) TXD1 DMAREQZ1 CCS_MON1 DMAACKZ1 CCI_ WAITEDGEH CCS_MON2 DMATCZ1 CCI_WRLENH CCS_MON3 CSISCK1 INTPZ22 CCM_IRLZ <R> CSISI1 INTPZ23 CCS_FUSEZ CSISO1 INTPZ24...
Page 24 R-IN32M3-CL User’s Manual 2. Pin Functions (3/4) Level during & after Name Mode 1 Mode 2 Mode 3 Mode 4 Reset SCL0 Hi-Z (High) SDA0 RTDMAREQZ CCM_MDIN0 RTDMAACKZ CCM_MDIN1 RTDMATCZ CCM_MDIN2 DMAREQZ0 CCM_MDIN3 DMAACKZ0 CCI_INTZ DMATCZ0 CSICS00 CCS_STATION_NO_0 / CCM_SNIN0 CSICS01 CCS_STATION_NO_1 / CCM_SNIN1...
Page 25 R-IN32M3-CL User’s Manual 2. Pin Functions RP0x to RP3x function as real-time ports which can transfer data via a dedicated DMA controller. They are able to input and output data in 32-bit units in synchronization with the DMA transfer trigger. (4/4) Level during &...
Page 26 Caution: The DMA interface pin is fixed to the specific channel of the DMA controller, and not assigned to any other DMA controller or channel. For details, see section 13, DMA Controllers, in the R-IN32M3 Series User's Manual: Peripheral Modules.<R>...
Page 27 R-IN32M3-CL User’s Manual 2. Pin Functions 2.1.7 External Interrupt Input Pins The chip has one non-maskable interrupt and 29 maskable interrupt input pins. Level during & after Pin Name Function Shared Port Active Reset NMIZ Non-maskable external interrupt Hi-Z (High) input INTPZ0-INTPZ5 External interrupt input...
Page 28 R-IN32M3-CL User’s Manual 2. Pin Functions 2.1.10 Trace Pins Level during & after Pin Name Function Active Reset TRACECLK Trace port clock output Clock output TRACEDATA3- Trace port data output TRACEDATA0 2.1.11 CPU Power Control Pin Level during & after Pin Name Function Shared Port...
Page 29 R-IN32M3-CL User’s Manual 2. Pin Functions 2.1.13 CC-Link IE Field Pins (Intelligent Device Station) Shared Level during & after Pin Name Function Port Active Reset CCI_RUNLEDZ Run status output Hi-Z (High) CCI_DLINKLEDZ Cyclic communication status output CCI_ERRLEDZ Field network error status output CCI_LERR1LEDZ Link error status output 1 CCI_LERR2LEDZ...
Page 30 R-IN32M3-CL User’s Manual 2. Pin Functions 2.1.14 CC-Link Pins (Intelligent Device Station) Shared Level during & after Pin Name Function Port Active Reset CCM_LINKERRZ O Link error LED control output Hi-Z (High) CCM_ERRZ Not used <R> CCM_RUNZ Run LED control output CCM_MDIN0- Transfer rate setting input <R>...
Page 31 R-IN32M3-CL User’s Manual 2. Pin Functions 2.1.15 CC-Link Pins (Remote Device Station) Caution: To use a remote device station, it is necessary to connect a CCS_REFSTB (P10) pin to a port pin with the external interrupt function (INTPZ). Shared Level during & after Pin Name Function Port...
Page 32 R-IN32M3-CL User’s Manual 2. Pin Functions 2.1.16 System Pins Level during & after Pin Name Function Active Reset Clock input pins OSCTH = 1: Oscillator is in use. XT1 and XT2 are respectively connected to GND and oscillator. CSCTH = 0: Resonator is in use. XT1 and XT2 are connected to resonator.
Page 33 TMODE0-TMODE2 Test mode select pin Mode select signal Serial data input Serial data output TRSTZ Reset signal Clock signal (JTAG clock) TMC1 Renesas test pins TMC2 2.1.18 Operating Mode Setting Pins Level during & after Pin Name Function Active Reset...
Page 34 HIFSYNC = 0: Asynchronous SRAM interface mode HIFSYNC = 1: Synchronous SRAM interface mode For details, see section 11, External MCU Interface, in the R-IN32M3 Series User’s Manual (Peripheral Modules). 2. The external MCU interface HWRZ or HBENZ is selectable by the level on the HWRZSEL pin.
Page 35 R-IN32M3-CL User’s Manual 2. Pin Functions Pin States The initial state of the port functions after release from the reset state differs depending on the state of the operating mode setting pins. For the state of the operating mode setting pins in each boot mode and the supported combinations, see sectio n 2.1.18, Operating Mode Setting Pins.
Page 36 R-IN32M3-CL User’s Manual 2. Pin Functions 2.2.1 Pin States when Booting is from External Memory External Memory Boot (BOOT1-0 = 00) Slave Memory Interface (MEMIFSEL = 0) Asynchronous SRAM Memory Controller (MEMCSEL = 0) Synchronous Burst Access Memory Controller (MEMCSEL = 1) Name 16-bit (BUS32EN = 0) 32-bit (BUS32EN = 1)
Page 37 R-IN32M3-CL User’s Manual 2. Pin Functions External Memory Boot (BOOT1-0 = 00) Slave Memory Interface (MEMIFSEL = 0) Asynchronous SRAM Memory Controller (MEMCSEL = 0) Synchronous Burst Access Memory Controller (MEMCSEL = 1) Name 16-bit (BUS32EN = 0) 32-bit (BUS32EN = 1) 16-bit (BUS32EN = 0) 32-bit (BUS32EN = 1) R18UZ0005EJ0400...
Page 38 R-IN32M3-CL User’s Manual 2. Pin Functions External Memory Boot (BOOT1-0 = 00) Slave Memory Interface (MEMIFSEL = 0) Asynchronous SRAM Memory Controller (MEMCSEL = 0) Synchronous Burst Access Memory Controller (MEMCSEL = 1) Name 16-bit (BUS32EN = 0) 32-bit (BUS32EN = 1) 16-bit (BUS32EN = 0) 32-bit (BUS32EN = 1) RP00...
Page 39 R-IN32M3-CL User’s Manual 2. Pin Functions 2.2.2 Pin States when Booting is from External Serial Flash ROM Remarks 1. Asynchronous type: Asynchronous SRAM memory controller (MEMCSEL = 0) Synchronous type: Synchronous burst access memory controller (MEMCSEL = 1) 2. 16-bit: 16-bit bus width of the external memory interface (BUS32EN = 0) 32-bit: 32-bit bus width of the external memory interface (BUS32EN = 1) External Serial Flash ROM Boot (BOOT1-0 = 01) Slave Memory Interface (MEMIFSEL = 0)
Page 40 R-IN32M3-CL User’s Manual 2. Pin Functions External Serial Flash ROM Boot (BOOT1-0 = 01) Slave Memory Interface (MEMIFSEL = 0) External MCU Interface (MEMIFSEL = 1) Asynchronous Type Synchronous Type Asynchronous Type Synchronous type Pin Name 16-bit 32-bit 16-bit 32-bit 16-bit 32-bit 16-bit...
Page 41 R-IN32M3-CL User’s Manual 2. Pin Functions External Serial Flash ROM Boot (BOOT1-0 = 01) Slave Memory Interface (MEMIFSEL = 0) External MCU Interface (MEMIFSEL = 1) Asynchronous Type Synchronous Type Asynchronous Type Synchronous type Pin Name 16-bit 32-bit 16-bit 32-bit 16-bit 32-bit 16-bit...
Page 42 R-IN32M3-CL User’s Manual 2. Pin Functions 2.2.3 Pin States when Booting is for External MCU External MCU Boot (BOOT1-0 = 10) External MCU Interface (MEMIFSEL = 1) Asynchronous SRAM Memory Controller (MEMCSEL = 0) Synchronous Burst Access Memory Controller (MEMCSEL = 1) Name 16-bit (BUS32EN = 0) 32-bit (BUS32EN = 1)
Page 43 R-IN32M3-CL User’s Manual 2. Pin Functions External MCU Boot (BOOT1-0 = 10) External MCU Interface (MEMIFSEL = 1) Asynchronous SRAM Memory Controller (MEMCSEL = 0) Synchronous Burst Access Memory Controller (MEMCSEL = 1) Name 16-bit (BUS32EN = 0) 32-bit (BUS32EN = 1) 16-bit (BUS32EN = 0) 32-bit (BUS32EN = 1) HWAITZ...
Page 44 R-IN32M3-CL User’s Manual 2. Pin Functions External MCU Boot (BOOT1-0 = 10) External MCU Interface (MEMIFSEL = 1) Asynchronous SRAM Memory Controller (MEMCSEL = 0) Synchronous Burst Access Memory Controller (MEMCSEL = 1) Name 16-bit (BUS32EN = 0) 32-bit (BUS32EN = 1) 16-bit (BUS32EN = 0) 32-bit (BUS32EN = 1) RP00...
Page 45 The table below lists the operating mode setting pins for which the settings can be checked. For details of the operating mode monitor register, refer to the R-IN32M3 Series User’s Manual (Peripheral Modules). Table 2.3 Operating Mode Setting Pins for which the Settings can be Checked...
Page 46 R-IN32M3-CL User’s Manual 2. Pin Functions Buffer Types and Handling of Unused Pins 2.5.1 Ethernet Pins (1) PHY Interface Pins Recommended Connection Pin Name Interface when Not in Use ETH0_TXC Input buffer (3.3 V) Connect to GND ETH0_GTXC BID_BUF(3.3V_GMII_MII)_with_IOLH_Control Open ETH0_TXEN ETH0_TXER ETH0_TXD0-...
Page 47 Output buffer (3.3 V) 6 mA Open CLKOUT25M1 Note: The pin connection differs depending on the setting of the OSCTH pin. For details, see the R-IN32M3 Series User’s Manual (Board design edition). R18UZ0005EJ0400 Page 37 of 104 Dec. 28, 2018...
Page 48 R-IN32M3-CL User’s Manual 2. Pin Functions 2.5.5 Test Pins Required Connection when Not Pin Name Interface in Use TMODE0-TMODE2 Input buffer (3.3 V) Schmitt in, Connect to GND 50kΩ pull-down I/O buffer (3.3 V) 6 mA 50kΩ pull-up Open Input buffer (3.3 V), 50kΩ pull-up Open 3-state output buffer (3.3 V) 6mA Open...
Page 49 R-IN32M3-CL User’s Manual 2. Pin Functions 2.5.6 Port Pins (1/2) Recommended connection Pin Name Interface when Not in use P00-P07 Programmable I/O buffer (3.3 V) Open Load drive select function (6 mA, 12 mA) Resistor select function (50kΩ pull-up or 50kΩ pull-down or less) P11-P17, P22-P24, P27 Programmable I/O buffer (3.3 V) (6 mA) Resistor select function...
Page 50 R-IN32M3-CL User’s Manual 2. Pin Functions (2/2) Recommended Connection Pin Name Interface when Not in Use P70-P77 Programmable I/O buffer (3.3 V) (6 mA) Open Resistor select function (50kΩ pull-up or 50kΩ pull-down or less) RP00-RP07 Programmable I/O buffer (3.3 V) Load drive select function (6 mA, 12 mA) RP10-RP17 Resistor select function...
Page 51 <R>Note: The addresses of the instruction RAM mirror area (768 Kbytes) where access actually occurs will change according to the selected boot mode. For details, see section 5.3, Memory MAP in Each Boot Mode, in the R-IN32M3 Series User’s Manual: Peripheral Modules.
Page 52 R-IN32M3-CL User’s Manual 3. Memory Maps 4007 FFFFH ETHER SWITCH control register area (64 Kbytes) 4007 0000H Reserved CAN1 area (128 Kbytes) 4004 0000H CAN0 area (128 Kbytes) 4002 0000H System register area (64 Kbytes) 4001 0000H Reserved Watchdog timer (16 bytes) 4000 0700H Reserved...
Page 53 R-IN32M3-CL User’s Manual 3. Memory Maps 1FFF FFFFH CSZ3 area (64 Mbytes) 1C00 0000H 1BFF FFFFH CSZ2 area Reserved 2008 0000H (64 Mbytes) 2007 FFFFH 1800 0000H Data RAM area 17FF FFFFH (512 Kbytes) 2000 0000H CSZ1 area 1FFF FFFFH (64 Mbytes) External memory area 1400 0000H...
Page 54 For details, see section 5.3, Memory MAP in Each Boot Mode, and section 4, Bus Architecture, in the R-IN32M3 Series User’s Manual: Peripheral Modules. BOOT1...
Page 55 R-IN32M3-CL User’s Manual 4. Exception Handling Exception Handling The R-IN32M3 uses the interrupt controller of Cortex-M3. Refer to the following URL of Arm for the exceptions handling operation of Cortex-M3. http://infocenter.arm.com/help/topic/com.arm.doc.set.cortexm/index.html Exceptions List Exception numbers 1 to 15 are system exceptions of the Cortex-M3 CPU. Interrupts from the internal hardware of the R-IN32M3 and external pins are assigned to exception number 16 and higher exception numbers.
Page 56 R-IN32M3-CL User’s Manual 4. Exception Handling List of Interrupts The interrupts below are the exceptions (interrupts) with exception numbers 16 and higher, which are assigned to the NVIC of the Cortex-M3 CPU. In the R-IN32M3, interrupts from the internal hardware and external pins are connected not only to the NVIC of the Cortex-M3 but also to the internal hardware real-time OS (HW-RTOS), trigger for starting the internal DMA controllers (common to both the general-purpose DMAC and real-time port DMAC), real-time ports, and timers.
Page 57 R-IN32M3-CL User’s Manual 4. Exception Handling Table 4.1 List of Interrupts (1/4) Connected to Excep- Real- tion Time Name Interrupt Source NVIC RTOS DMAC Port Timer      INTTAUJ2I0 Timer array TAUJ2 channel 0 interrupt   ...
Page 58 R-IN32M3-CL User’s Manual 4. Exception Handling (2/4) Connected to Excep- Real- tion Time Name Interrupt Source NVIC RTOS DMAC Port Timer Reserved Reserved      INTBUFDMA Inter-buffer DMA transfer completion      INTPHY0 Ether PHY interrupt 0 ...
Page 59 R-IN32M3-CL User’s Manual 4. Exception Handling (3/4) Connected to Excep- Real- tion Time Name Interrupt Source NVIC RTOS DMAC Port Timer      INTPZ20 INTPZ20 input      INTPZ21 INTPZ21 input    ...
Page 60 R-IN32M3-CL User’s Manual 4. Exception Handling (4/4) Connected to Excep- Real- tion Time Name Interrupt Source NVIC RTOS DMAC Port Timer  BRAMECCDED Buffer RAM 2-bit ECC error detection interrupt      INTCCISYCO CC-Link IE Synco interrupt ...
Page 61 R-IN32M3-CL User’s Manual 5. Peripheral Modules Peripheral Modules For details of the following peripheral modules, refer to the R-IN32M3 Series User’s Manual (Peripheral Modules). Clock function/Reset function CPU/Internal RAM Bus structure Hardware real-time OS Gigabit Ethernet interface Asynchronous SRAM memory controller...
Page 62 R-IN32M3-CL User’s Manual 6. CC-Link IE Field (Intelligent Device Station) Function CC-Link IE Field (Intelligent Device Station) Function The CC-Link IE field intelligent device station has functionality equivalent to that of the dedicated CP220 communications LSI chip manufactured by Mitsubishi Electric Corporation. The outline specifications of the CC-Link IE field are as follows.
Page 63 R-IN32M3-CL User’s Manual 6. CC-Link IE Field (Intelligent Device Station) Function 6.1.1 CC-Link IE Field (Intelligent Device Station) Clock Gate Register (CIECLKGTD) The CIECLKGTD register is used to temporarily stop supply of the bus clock signal. This is to prevent the generation of a clock glitch when switching the bus clock signal from the CC-Link IE field network.
Page 64 R-IN32M3-CL User’s Manual 6. CC-Link IE Field (Intelligent Device Station) Function 6.1.2 CC-Link IE Field (Intelligent Device Station) Wait Delay Register (CIEWAITDLY) The CIEWAITDLY register is used to extend the wait period cycle to the bus of the CC-Link IE field network. From 4 to 0 cycles are selectable as the period of waiting.
Page 65 R-IN32M3-CL User’s Manual 6. CC-Link IE Field (Intelligent Device Station) Function 6.1.3 CC-Link IE Field (Intelligent Device Station) Bus Size Control Register (CIEBSC) The CIEBSC register is for setting the data bus width to access the CC-Link IE field (intelligent device station). When using the CC-Link IE field (intelligent device station), set the bits of this register to 0000 5555H.
Page 66 Access to the CC-Link IE field from the Cortex-M3 and DMA controller is enabled by switching the access paths by using the SRAM bridge select register (SRAMBRSEL). For the detailed specification of the register, refer to the R-IN32M3 Series User’s Manual (Peripheral Modules). Below is an example procedure for switching access paths.
Page 67 R-IN32M3-CL User’s Manual 7. Port Functions Port Functions Features  I/O pins: 96  Multiplexed with I/O pin functions of peripheral modules  Input or output can be specified by bit units. Cautions 1. Switching from a signal for a peripheral module that is multiplexed with a port pin to port mode might lead to a spike, depending on the state of the pin at the time.
Page 68 R-IN32M3-CL User’s Manual 7. Port Functions Port Configuration The R-IN32M3-CL incorporates eight 3-state I/O ports and four real-time control ports. Input or output mode can be specified for ports in 1-bit units. The basic structure of ports is the 8-bit unit, but ports 0 to 3 can also be grouped to enable reading and writing in 32-bit units.
Page 69 R-IN32M3-CL User’s Manual 7. Port Functions Inactive level of multiplexed function 0 Input multiplexed function 0 Inactive level of multiplexed function 1 Input multiplexed function 1 Inactive level of multiplexed function 2 Input multiplexed function 2 Inactive level of multiplexed function 3 Input multiplexed function 3 Input/output attribute of multiplexed function 0...
Page 70 R-IN32M3-CL User’s Manual 7. Port Functions List of Registers (1/6) Register Name Symbol Address Port register 0 (8 bits) 400A 3000H Port register 1 (8 bits) 400A 3001H Port register 2 (8 bits) 400A 3002H Port register 3 (8 bits) 400A 3003H Port register 4 (8 bits) 400A 3004H...
Page 71 R-IN32M3-CL User’s Manual 7. Port Functions (2/6) Register Name Symbol Address Port mode control register 0 (8 bits) PMC0B 400A 3020H Port mode control register 1 (8 bits) PMC1B 400A 3021H Port mode control register 2 (8 bits) PMC2B 400A 3022H Port mode control register 3 (8 bits) PMC3B 400A 3023H...
Page 72 R-IN32M3-CL User’s Manual 7. Port Functions (3/6) Register Name Symbol Address Port function control expansion register 0 (8 bits) PFCE0B 400A 3040H Port function control expansion register 1 (8 bits) PFCE1B 400A 3041H Port function control expansion register 2 (8 bits) PFCE2B 400A 3042H Port function control expansion register 3 (8 bits)
Page 73 R-IN32M3-CL User’s Manual 7. Port Functions (4/6) Register Name Symbol Address RT port register 0 (8 bits) RP0B 400A 3400H RP1B 400A 3401H RT port register 1 (8 bits) RP2B 400A 3402H RT port register 2 (8 bits) RP3B 400A 3403H RT port register 3 (8 bits) RT port register 0 (16 bits) RP0H...
Page 74 R-IN32M3-CL User’s Manual 7. Port Functions (5/6) Register Name Symbol Address RT port function control expansion register 0 (8 bits) RPFCE0B 400A 3440H RT port function control expansion register 1 (8 bits) RPFCE1B 400A 3441H RT port function control expansion register 2 (8 bits) RPFCE2B 400A 3442H RT port function control expansion register 3 (8 bits)
Page 75 R-IN32M3-CL User’s Manual 7. Port Functions (6/6) Register Name Symbol Address Buffer function change register P0L DRCTLP0L 4001 0220H Buffer function change register P0H DRCTLP0H 4001 0224H Buffer function change register P1L DRCTLP1L 4001 0228H Buffer function change register P1H DRCTLP1H 4001 022CH Buffer function change register P2L...
Page 76 R-IN32M3-CL User’s Manual 7. Port Functions 7.3.1 Port Registers (P, RP) The R-IN32M3-CL incorporates twelve 3-state I/O ports. Input or output can be specified in 1-bit units. The port registers are used for writing the output levels for output port pins. When read, the value of the given port register is read. The PIN and RPIN registers are used to read the levels on input pins.
Page 77 R-IN32M3-CL User’s Manual 7. Port Functions Address 400A 3000H Initial value 0000H Address 400A 3002H Initial value 0000H Address 400A 3004H Initial value 0000H Address 400A 3006H Initial value 0000H Address RP0H RP17 RP16 RP15 RP14 RP13 RP12 RP11 RP10 RP07 RP06 RP05 RP04 RP03 RP02 RP01 RP00 400A 3400H Initial value 0000H...
Page 78 R-IN32M3-CL User’s Manual 7. Port Functions Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 400A 3000H Initial value 0000 0000H R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 400A 3004H...
Page 79 R-IN32M3-CL User’s Manual 7. Port Functions 7.3.2 Port Mode Registers (PM, RPM) These registers are used to set a port to input or output mode. Initial Address value PM0B PM07 PM06 PM05 PM04 PM03 PM02 PM01 PM00 400A 3010H PM1B PM17 PM16 PM15...
Page 80 R-IN32M3-CL User’s Manual 7. Port Functions Address PM0H PM17 PM16 PM15 PM14 PM13 PM12 PM11 PM10 PM07 PM06 PM05 PM04 PM03 PM02 PM01 PM00 400A 3010H Initial value FFFFH Address PM2H PM37 PM36 PM35 PM34 PM33 PM32 PM31 PM30 PM27 PM26 PM25 PM24 PM23 PM22 PM21 PM20 400A 3012H Initial value FFFFH...
Page 81 R-IN32M3-CL User’s Manual 7. Port Functions Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 400A 3010H Initial value PM0W FFFF FFFFH R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 400A 3014H...
Page 82 R-IN32M3-CL User’s Manual 7. Port Functions 7.3.3 Port Mode Control Registers (PMC, RPMC) These registers are used to select whether to use a port as a port or for its alternate function. Initial Address value PMC0B PMC07 PMC06 PMC05 PMC04 PMC03 PMC02 PMC01...
Page 83 R-IN32M3-CL User’s Manual 7. Port Functions Address PMC0H 400A 3020H Initial value Note 1 0000H Address PMC2H 400A 3022H Initial value Note 1 0000H Address PMC4H 400A 3024H Initial value Note 1 0000H Address PMC6H 400A 3026H Initial value Note 1 0000H Address RPMC0H...
Page 84 R-IN32M3-CL User’s Manual 7. Port Functions R18UZ0005EJ0400 Page 74 of 104 Dec. 28, 2018...
Page 85 R-IN32M3-CL User’s Manual 7. Port Functions Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 400A 3020H Initial value PMC0W Note 1 0000 0000H R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 400A 3024H...
Page 86 R-IN32M3-CL User’s Manual 7. Port Functions 7.3.4 Port Function Control Registers (PFC, RPFC) These registers are used to specify which multiplexed function is to be used. These registers can be set in 1-bit units. Initial Address value PFC0B PFC07 PFC06 PFC05 PFC04 PFC03...
Page 87 R-IN32M3-CL User’s Manual 7. Port Functions Address PFC0H 400A 3030H Initial value 0000H Address PFC2H 400A 3032H Initial value Note 1 0000H Address PFC4H 400A 3034H Initial value Note 1 0000H Address PFC6H 400A 3036H Initial value Note 1 0000H Address RPFC RPFC...
Page 88 R-IN32M3-CL User’s Manual 7. Port Functions Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 400A 3030H Initial value 0 0 0 0 0 0 0 0 0 PFC0W Note 1 0000 0000H...
Page 89 R-IN32M3-CL User’s Manual 7. Port Functions 7.3.5 Port Function Control Expansion Registers (PFCE, RPFCE) These registers are used to specify which multiplexed extended function is to be used. These registers can be set in 1-bit units. Initial Address value PFCE0B PFCE07 PFCE06 PFCE05...
Page 90 R-IN32M3-CL User’s Manual 7. Port Functions Address PFCE PFCE PFCE PFCE PFCE PFCE PFCE PFCE PFCE PFCE0H 400A 3040H Initial value 0000H Address PFCE PFCE PFCE PFCE PFCE PFCE PFCE PFCE PFCE PFCE PFCE PFCE PFCE PFCE2H 400A 3042H Initial value Note 1 0000H Address...
Page 91 R-IN32M3-CL User’s Manual 7. Port Functions Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 400A 3040H Initial value PFCE0W 0 0 0 0 0 0 0 0000 0000H Note 1 R/W R/W R/W R/W R/W R/W 0...
Page 92 R-IN32M3-CL User’s Manual 7. Port Functions 7.3.6 Port Pin Input Registers (PIN, RPIN) These are read-only registers for reading the input level of port pins. Initial Address value PIN0B PIN07 PIN06 PIN05 PIN04 PIN03 PIN02 PIN01 PIN00 400A 3050H Pin level PIN1B PIN17 PIN16...
Page 93 R-IN32M3-CL User’s Manual 7. Port Functions Address PIN0H 400A 3050H Initial value Pin level Address PIN2H 400A 3052H Initial value Pin level Address PIN4H 400A 3054H Initial value Pin level Address PIN6H 400A 3056H Initial value Pin level Address RPIN RPIN RPIN RPIN...
Page 94 R-IN32M3-CL User’s Manual 7. Port Functions Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 400A 3050H Initial value PIN0W Pin level Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 400A 3054H Initial value PIN4W...
Page 95 R-IN32M3-CL User’s Manual 7. Port Functions List of Selectable Multiplexed Functions The table below lists the combinations of multiplexed functions that can be specified by using the port-related registers. (1) Ports (P00 to P77) (1/3) PMCmn = 1 (Control Mode) PMCmn = 0 (Port Mode) PFCEmn = 0 PFCEmn = 1...
Page 96 R-IN32M3-CL User’s Manual 7. Port Functions (2/3) PMCmn = 1 (Control Mode) PMCmn = 0 (Port Mode) PFCEmn = 0 PFCEmn = 1 PFCmn = 0 PFCmn = 1 PFCmn = 0 PFCmn = 1 PMmn = 0 PMmn = 1 (Multiplexed (Multiplexed (Multiplexed...
Page 97 R-IN32M3-CL User’s Manual 7. Port Functions (3/3) PMCmn = 1 (Control Mode) PMCmn = 0 (Port Mode) PFCEmn = 0 PFCEmn = 1 PFCmn = 0 PFCmn = 1 PFCmn = 0 PFCmn = 1 PMmn = 0 PMmn = 1 (Multiplexed (Multiplexed (Multiplexed...
Page 98 R-IN32M3-CL User’s Manual 7. Port Functions (2) Real-Time Ports (RP00 to RP37) PMCmn = 1 (Control Mode) PMCmn = 0 (Port Mode) RPFCEmn = 0 RPFCEmn = 1 PFCmn = 1 PFCmn = 0 (Multiplexe PFCmn = 0 PFCmn = 1 PMmn = 0 PMmn = 1 (Multiplexed...
Page 99 R-IN32M3-CL User’s Manual 7. Port Functions Buffer Switching Registers (DRCTL) For some port pins, the driving ability and the connection or disconnection of a pull-up or pull-down resistor is programmable. Set up the DRCTL registers during initialization after release from the reset state. After that, change the setting of a given DRCTL register only while the buffer functions for the corresponding pins are not in use.
Page 100 R-IN32M3-CL User’s Manual 7. Port Functions 7.5.1 Port 0 Buffer Switching Registers (DRCTLP0L, DRCTLP0H) Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 BASE+0220H DRCTLP0L 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Initial value 0000 9999H 0 R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W...
Page 101 R-IN32M3-CL User’s Manual 7. Port Functions 7.5.2 Port 1 Buffer Switching Registers (DRCTLP1L, DRCTLP1H) Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 BASE+0228H DRCTLP1L 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Initial value 0000 9959H 0 R/W R/W 0...
Page 102 R-IN32M3-CL User’s Manual 7. Port Functions 7.5.3 Port 2 Buffer Switching Registers (DRCTLP2L, DRCTLP2H) Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 BASE+0230H DRCTLP2L 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Initial value 0000 9999H 0 R/W R/W 0...
Page 103 R-IN32M3-CL User’s Manual 7. Port Functions 7.5.4 Port 3 Buffer Switching Registers (DRCTLP3L, DRCTLP3H) Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 BASE+0238H DRCTLP3L 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Initial value 0000 9999H 0 R/W R/W 0...
Page 104 R-IN32M3-CL User’s Manual 7. Port Functions 7.5.5 Port 4 Buffer Switching Registers (DRCTLP4L, DRCTLP4H) Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 BASE+0240H DRCTLP4L 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Initial value 0000 9999H 0 R/W R/W 0...
Page 105 R-IN32M3-CL User’s Manual 7. Port Functions 7.5.6 Port 5 Buffer Switching Registers (DRCTLP5L, DRCTLP5H) Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 BASE+0248H DRCTLP5L 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Initial value 0000 0599H 0 R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W...
Page 106 R-IN32M3-CL User’s Manual 7. Port Functions 7.5.7 Port 6 Buffer Switching Registers (DRCTLP6L, DRCTLP6H) Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 BASE+0250H DRCTLP6L 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Initial value 0000 9999H 0 R/W R/W 0...
Page 107 R-IN32M3-CL User’s Manual 7. Port Functions 7.5.8 Port 7 Buffer Switching Registers (DRCTLP7L, DRCTLP7H) Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 BASE+0258H DRCTLP7L 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Initial value 0000 9999H 0 R/W R/W 0...
Page 108 R-IN32M3-CL User’s Manual 7. Port Functions 7.5.9 Real-Time Port 0 Buffer Switching Registers (DRCTLRP0L, DRCTLRP0H) Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 BASE+0260H DRCTLRP0L Initial value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0...
Page 109 R-IN32M3-CL User’s Manual 7. Port Functions 7.5.10 Real-Time Port 1 Buffer Switching Registers (DRCTLRP1L, DRCTLRP1H) Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 BASE+0268H DRCTLRP1L Initial value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0...
Page 110 R-IN32M3-CL User’s Manual 7. Port Functions 7.5.11 Real-Time Port 2 Buffer Switching Registers (DRCTLRP2L, DRCTLRP2H) Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 BASE+0270H DRCTLRP2L Initial value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0...
Page 111 R-IN32M3-CL User’s Manual 7. Port Functions 7.5.12 Real-Time Port 3 Buffer Switching Registers (DRCTLRP3L, DRCTLRP3H) Address 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 BASE+0278H DRCTLRP3L Initial value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0...
Page 112 R-IN32M3-CL User’s Manual 7. Port Functions Operation of Port Functions Operation of the ports differs depending on the I/O mode setting as described below. 7.6.1 Reading and Writing via I/O Ports (1) In Output Mode If a value is written to port register n (Pn or RPn), the value is written to that port's output latch (Pn or RPn). The value of the output latch is output from the pin.
Page 113 The state of the 32-bit port pins RP00 to RP37 can be updated in synchronization with an interrupt from an on-chip peripheral function. Use the RPTRGMD register to set trigger-synchronous port control mode in 1-bit units. To select the target trigger, use the RPTFR0 to RPTFR3 registers. For details, see the R-IN32M3 Series User’s Manual (Peripheral Modules). PORT RPx_DO (RTGPIO) RPxｘ...
Page 114 R-IN32M3-CL User’s Manual 8. Electrical Characteristics Electrical Characteristics For details on the electrical characteristics, refer to the R-IN32M3 Series Datasheet. R18UZ0005EJ0400 Page 104 of 104 Dec. 28, 2018...
Page 115 R-IN32M3-CL User’s Manual Revision History REVISION R-IN32M3-CL User’s Manual HISTORY Rev. Date Description Page Summary 1.00 Feb. 8, 2013 First edition issued (Preliminary) 1.00 Apr. 03,2013 Overall Modification of English expressions Overall Change the description of “CC-Link IE Field” “CC-Link IE field slave“ → “CC-Link IE field (intelligent device station)” Overall Change the description of “CC-Link”...
Page 116 R-IN32M3-CL User’s Manual Revision History Rev. Date Description Page Summary 2.00 Feb. 07, 2014 41 Addition the register of 6.1.2 CC-Link IE Field (Intelligent Device Station) Wait Delay Register (CIEWAITDLY) Modification of Address of 6.1.4 CC-Link IE Field (Intelligent Device Station) Bus Bridge Control Register (CIESMC) Modification of initial value of PM0W, PM4W, and PRM0W registers of 7.3.2 Port Mode Registers (PM, RPM)
Page 117 R-IN32M3-CL User’s Manual Revision History Rev. Date Description Page Summary 3.00 Jan. 22, 2016 2.5.7 Operating Mode Setting Pins Recommended connection when not in use, modified 2.5.8 CC-Link IE Field Pin (Intelligent Device Station) Recommended connection when not in use, modified Figure 3.1 Memory Map (ALL) Instruction RAM area and instruction RAM mirror area, modified Figure 3.5External MCU Interface Area...
Page 118 R-IN32M3-CL User’s Manual Revision History Rev. Date Description Page Summary 4.00 Dec. 28, 2018 6 1.5 Base Addresses of the System Registers Area The description on the base addresses of the system registers area was added. 2.1.4 Port Pins and Real-Time Port Pins The pin name indicated as "CCM_IRZ"...
Page 119 R-IN32M3-CL User’s Manual Revision History [Memo]...
Page 120 R-IN32M3 Series User’s Manual: R-IN32M3-CL Publication Date: Rev.1.00 (Preliminary) Feb 08, 2013 Rev.4.00 Dec 28, 2018 Published by: Renesas Electronics Corporation...
Page 121 R-IN32M3 Series User’s Manual R-IN32M3-CL R18UZ0005EJ0400...
Page 122 SALES OFFICES Refer to "http://www.renesas.com/" for the latest and detailed information. California Eastern Laboratories, Inc. 4590 Patrick Henry Drive, Santa Clara, California 95054-1817, U.S.A. Tel: +1-408-919-2500, Fax: +1-408-988-0279 Renesas Electronics Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K...

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