Renesas R-IN32M3 Series User Manual page 57

R-IN32M3-EC User's Manual
1F FFFFH
18 0000H
17 FFFFH
10 0000H
0F FFFFH
HOSTIF registers area
0F FF00H
0F C000H
0F BFFFH
0F B000H
0F AFFFH
CC-Link master I/O
0F A000H
0F 9FFFH
2Mbyte
CC-Link master memory
0F 8000H
0E 3000H
0E 2FFFH
0E 0F80H
0D FFFFH
System registers area
0D 0000H
0C FFFFH
AHB peripheral area
0C 3000H
0C 0000H
0B FFFFH
Instruction RAM mirror
00 0000H
Figure 3.5 External MCU Interface Area
Note: The addresses of the instruction RAM mirror area (768 Kbytes) where access actually occurs
will change according to the selected boot mode, as shown in the table below. For details, see
section 5.3, Memory MAP in Each Boot Mode, and section 4, Bus Architecture, in the
R-IN32M3 Series User's Manual: Peripheral Modules.
BOOT1
0
0
1
1
R18UZ0003EJ0501
Jan. 12, 2021
MCU area
Data RAM area
(512 Kbytes)
Reserved
(256 bytes)
Reserved
CC-Link slave
area (4 Kbytes)
area (4 Kbytes)
area (8 Kbytes)
Reserved
EtherCAT area
(8.125 Kbytes)
Reserved
(64 Kbytes)
(upper 52 Kbytes)
Reserved
Note
area
(768 Kbytes)
BOOT0 Boot Mode
0 External memory boot
1 External serial flash
ROM boot
0 External MCU boot
1 Instruction RAM boot
Internal AHB area
Reserved
CC-Link slave
area (4 Kbytes)
CC-Link master I/O
area (4 Kbytes)
CC-Link master memory
area (8 Kbytes)
Reserved
EtherCAT area
(8.125 Kbytes)
Reserved
AHB peripheral area
(upper 52 Kbytes)
System registers area
(64 Kbytes)
Data RAM area
(512 Kbytes)
Reserved
Instruction RAM mirror
Note
area
(768 Kbytes)
Access Destination Area
—
Reserved
Instruction RAM area
Instruction RAM area
3. Memory Maps
400F C000H
400F BFFFH
400F B000H
400F AFFFH
400F A000H
400F 9FFFH
400F 8000H
400E 3000H
400E 2FFFH
4Gbyte
400E 0F80H
400E 0000H
400A FFFFH
400A 3000H
4001 FFFFH
4001 0000H
2007 FFFFH
2000 0000H
000D 2FFFH
000C 0000H
000B FFFFH
0000 0000H
Remarks
External MCU interface is
disabled
Access disabled
—
Enabled only for debugging
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