Renesas R-IN32M3 Series User Manual page 120

R-IN32M3-EC User's Manual
6.17.3 PHY Register Address Register (PHY_REG_ADR)
PHY_REG_ADR is used to set the PHY register address.
7
PHY_REG_
0
ADR
0
ECAT
0
PDI
Bit Position Bit Name
4 to 0 PHYREGADDR
Remark: Write access depends on the assignment of the management interface (ECAT/PDI). Write
access is generally blocked if the management interface is busy (bit 15 in the MII management
control/status register (MII_CONT_STAT: 0x0510) is 1).
6.17.4 PHY Data Register (PHY_DATA)
PHY_DATA is used to set data to write to the PHY register or to indicate read data from the PHY register.
15 14
PHY_DATA
R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W)
ECAT
R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W)
PDI
Bit Position Bit Name
15 to 0 PHYREGDATA
Remark: Write access depends on the assignment of the management interface (ECAT/PDI). Write
access is generally blocked if the management interface is busy (bit 15 in the MII management
control/status register (MII_CONT_STAT: 0x0510) is 1).
R18UZ0003EJ0501
Jan. 12, 2021
6 5 4
0 0
0 0 R/(W)
0 0 R/(W)
Address of the PHY register
13 12 11 10 9
PHYREGDATA
PHY Read/Write Data
6. EtherCAT Slave Controller Function
3 2 1
PHYREGADDR
R/(W) R/(W) R/(W)
R/(W) R/(W) R/(W)
Description
8 7 6 5 4 3
Description
0 Address
400E 0513H
R/(W)
R/(W)
Address
2 1 0
400E 0514H
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Initial Value
00H
Initial
Value
0000H