Renesas R-IN32M3 Series User Manual page 113

R-IN32M3-EC User's Manual
6.16 SII EEPROM Interface Registers
EtherCAT controls the SII EEPROM interface if bit 0 in the EEPROM configuration register (EEP_CONF: 0x0500) is 0
and bit 0 in the EEPROM PDI access state register (EEP_PDI_ACCESS: 0x0501) is 0. Otherwise PDI controls the
EEPROM interface.
6.16.1 EEPROM Configuration Register (EEP_CONF)
EEP_CONF is used to configure the EEPROM access.
7
EEP_CONF 0
0
ECAT
0
PDI
Bit Position Bit Name
1 FORCEECAT
0 CTRLPDI
R18UZ0003EJ0501
Jan. 12, 2021
6 5 4
0 0 0
0 0 0
0 0 0
Changes forcibly to the access from ECAT.
0: Unchanged from the current state
1: Bit 0 in the EEPROM PDI access state register (EEP_PDI_ACCESS: 0x0501) is reset to
0. That is, the EEPROM access control from PDI is released.
Specifies whether the EEPROM control is offered to PDI.
0: PDI does not have the EEPROM control
1: PDI has the EEPROM control
6. EtherCAT Slave Controller Function
3 2 1
0 0
0 0 R/W
0 0 R
Description
0 Address
400E 0500H
R/W
R
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Initial Value
00H