Renesas RA Series Quick Design Manual
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Renesas RA Family
RA2 Quick Design Guide
Introduction
This document answers common questions and points out subtleties of the MCU that might be missed
unless the hardware manual was extensively reviewed. The document is not intended to be a replacement
for the hardware manual; it is intended to supplement the manual by highlighting some key items most
engineers will need to start their own design. It also discusses some design decisions from an application
point of view.
Target Device
RA2 MCU Series
Contents
1.
Power Supplies ........................................................................................................................ 4
1.1
References .............................................................................................................................................. 5
2.
Emulator Support ..................................................................................................................... 6
2.1
SWD Interface ......................................................................................................................................... 7
2.2
Serial Programming Interface using SCI ................................................................................................. 8
2.3
Combination Debug Interface .................................................................................................................. 9
3.
MCU Operating Modes ............................................................................................................ 9
4.
Option Setting Memory .......................................................................................................... 10
4.1
Option Setting Memory Registers ......................................................................................................... 11
5.
Clock Circuits ......................................................................................................................... 12
5.1
Reset Conditions ................................................................................................................................... 13
5.2
Clock Frequency Requirements ............................................................................................................ 13
5.2.1
Requirements for USB Communications ............................................................................................ 14
5.2.2
Requirements for Programming and Erasing ROM or Data Flash ...................................................... 14
5.3
Lowering Clock Generation Circuit (CGC) Power Consumption ........................................................... 14
5.4
Writing the System Clock Control Registers ......................................................................................... 14
5.5
Clock Setup Example ............................................................................................................................ 15
5.6
HOCO Accuracy .................................................................................................................................... 15
5.7
Flash Interface Clock ............................................................................................................................. 16
5.8
Board Design ......................................................................................................................................... 16
5.9
External Crystal Resonator selection .................................................................................................... 16
5.10 External Clock Input .............................................................................................................................. 17
6.
Reset Requirements and the Reset Circuit ............................................................................ 17
6.1
Pin Reset ............................................................................................................................................... 18
6.2
Power-On Reset .................................................................................................................................... 18
R01AN6060EU0100 Rev.1.00
Sep.14.21
Application Note
Page 1 of 44
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Related Manuals for Renesas RA Series
Summary of Contents for Renesas RA Series
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Page 1: Table Of Contents
Application Note Renesas RA Family RA2 Quick Design Guide Introduction This document answers common questions and points out subtleties of the MCU that might be missed unless the hardware manual was extensively reviewed. The document is not intended to be a replacement for the hardware manual;... - Page 2 Renesas RA Family RA2 Quick Design Guide Independent Watchdog Timer Reset ..................... 18 Watchdog Timer Reset .......................... 18 Voltage-Monitoring Resets ........................19 Software Reset ............................19 Other Resets ............................19 Determination of Cold/Warm Start ......................19 Determining the Reset Source ......................19 Memory ..........................
- Page 3 Renesas RA Family RA2 Quick Design Guide 16. General Layout Practices....................... 40 16.1 Digital Domain vs. Analog Domain ......................40 16.2 High Speed Signal Design Considerations ................... 41 16.3 Signal Group Selections ........................41 17. References ..........................42 Revision History ..........................44 R01AN6060EU0100 Rev.1.00...
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Page 4: Power Supplies
Renesas RA Family RA2 Quick Design Guide 1. Power Supplies The RA family has digital power supplies and analog power supplies. The power supplies use the following pins. Table 1. Digital Power Supplies Symbol Name Description Power supply Power supply pin. Connect to the system power supply. -
Page 5: References
Renesas RA Family RA2 Quick Design Guide Table 2. Analog Power Supplies Symbol Name Description AVCC0 Analog power supply Analog voltage supply pin for the respective modules. Connect this pin to the same voltage as the VCC pin. AVSS0 Analog ground Analog ground for the respective modules. -
Page 6: Emulator Support
Renesas RA Family RA2 Quick Design Guide • 12-Bit A/D Converter (ADC12) • 16-Bit A/D Converter (ADC16) • 24-Bit Sigma-Delta A/D Converter (SDADC24) • 8-Bit D/A Converter (DAC8) • 12-Bit D/A Converter (DAC12) Table 3. RA2 MCU Groups, User’s Manual: Hardware... -
Page 7: Swd Interface
Renesas RA Family RA2 Quick Design Guide 2.1 SWD Interface Figure 1. SWD Interface Connections Note: 1. The output of the reset circuit of the user system must be open collector. R01AN6060EU0100 Rev.1.00 Page 7 of 44 Sep.14.21... -
Page 8: Serial Programming Interface Using Sci
Renesas RA Family RA2 Quick Design Guide 2.2 Serial Programming Interface using SCI Figure 2. Serial Programming Interface using SCI Connections Note: 1. The output of the reset circuit of the user system must be open collector. R01AN6060EU0100 Rev.1.00 Page 8 of 44... -
Page 9: Combination Debug Interface
Renesas RA Family RA2 Quick Design Guide 2.3 Combination Debug Interface Figure 3. Debug Interface for both SWD and programming with SCI Connections Note: 1. The output of the reset circuit of the user system must be open collector. 3. MCU Operating Modes The RA2 MCU series can enter one of two modes after reset: Single-chip mode or SCI/USB boot mode. -
Page 10: Option Setting Memory
Renesas RA Family RA2 Quick Design Guide Figure 4. Mode Setting Pin Level and Operating Mode Note that USB boot mode is only available on devices that have the USB Full Speed peripheral, such as RA2A1. For the RA2A1 MCU Group, USB boot mode doesn’t exist in 32-pin products. -
Page 11: Option Setting Memory Registers
WDT timeout, frequency, windowing, and interrupt type • OFS1 register LVD0 enable after reset HOCO startup after reset Renesas FSP Configurator supports setting of option memory in BSP settings, as shown in Figure 7 for RA2A1 MCU. R01AN6060EU0100 Rev.1.00 Page 11 of 44... -
Page 12: Clock Circuits
Renesas RA Family RA2 Quick Design Guide Figure 7. Option Memory Settings in FSP Configuration for RA2A1 MCU Clock Circuits Most RA2 MCUs have six primary oscillators. Five of these may be used as the source for the main system clock. -
Page 13: Reset Conditions
Renesas RA Family RA2 Quick Design Guide Table 5. RA2 Oscillators Oscillator Input Source Frequency Primary Uses Main clock External 1 MHz to 20 MHz Main system clock (ICLK), Peripheral crystal/resonator clocks, CAN clock, CAC clock, (MOSC) CLKOUT, flash clock... -
Page 14: Requirements For Usb Communications
Renesas RA Family RA2 Quick Design Guide 5.2.1 Requirements for USB Communications The USB 2.0 Full-Speed Module (USBFS) requires a 48-MHz USB clock signal (UCLK). For RA2 devices with a USBFS Module, the HOCO is the clock source for UCLK. Therefore, the HOCO must be configured for 48-MHz operation when using the USBFS Module. -
Page 15: Clock Setup Example
Figure 8. Timing of Clock Source Switching 5.5 Clock Setup Example Renesas FSP provides a simple, visual clock configuration tool for RA2A1 MCU shown as follows. This configurator configures code in the board support package to initialize the Clock Generation Circuit based on user selection, with proper precautions as indicated in the MCU hardware user manual. -
Page 16: Flash Interface Clock
Renesas RA Family RA2 Quick Design Guide a reduced component count in a PCB design. However, there are performance tradeoffs and limitations due to the clock accuracy which should be evaluated for your application. For RA2E2 devices, there are is no external crystal or external clock input. An internal clock (HOCO, MOCO, or LOCO) must be selected as the main system clock. -
Page 17: External Clock Input
Renesas RA Family RA2 Quick Design Guide Figure 11. Equivalent Circuit of the Crystal Resonator Selection of the capacitor values for CL1 and CL2 will affect the accuracy of the internal clock. To understand the impact of the values for CL1 and CL2, the circuit should be simulated using the equivalent circuit of the crystal resonator in the figure above. -
Page 18: Pin Reset
Renesas RA Family RA2 Quick Design Guide Table 8. RA2 Device Resets Reset Name Source Pin reset RES# is driven low Power-on reset VCC rises (voltage detection: VPOR) Independent watchdog timer reset The independent watchdog timer underflows, or a refresh occurs... -
Page 19: Voltage-Monitoring Resets
“Determination of Reset Generation Source” for the flow diagram. The following sample code shows how to determine if a reset is caused by Power On Reset or Software Reset using CMSIS based register structure in Renesas FSP. /* Power on Reset */ if(1 == R_SYSTEM->RSTSR0_b.PORF) -
Page 20: Memory
Renesas RA Family RA2 Quick Design Guide 7. Memory The RA2 MCUs support a 4-GB linear address space ranging from 0000 0000h to FFFF FFFFh that can contain program, data, and external memory bus. Program and data memory share the address space. -
Page 21: Peripheral I/O Registers
Flash I/O registers to control access flash memory occupy two regions, 407E 0000h to 407E FFFFh. The Renesas FSP contains C header files in CMSIS data structure that map all of the peripheral I/O registers for a specific device to easily accessible I/O data structures. -
Page 22: Background Operation
Refer to the “OCD/Serial Programmer ID Setting Register (OSIS)” and “ID Code Protection” and sections of RA2 MCU Hardware User’s Manual for more information. Renesas FSP configurator provides options to set up ID code protection for RA2 MCUs as shown in Figure R01AN6060EU0100 Rev.1.00 Page 22 of 44 Sep.14.21... -
Page 23: Memory Protection Unit
Renesas RA Family RA2 Quick Design Guide Figure 16. ID Code Setup for RA2A1 Using Renesas FSP Configurator Note: ID code protection settings must be handled carefully to prevent mistakes that may result in blocking access to the MCU. 7.3.3 Memory Protection Unit RA2 MCUs have a Memory Protection Unit (MPU). -
Page 24: Restriction On Endianness
Renesas RA Family RA2 Quick Design Guide Figure 17. MPU Setup for RA2A1 Using Renesas FSP Configurator Note: MPU settings must be handled carefully to prevent mistakes that may result in blocking accesses to an MCU region. 7.4 Restriction on Endianness Memory space must be little-endian to execute code on the Cortex-M core. -
Page 25: I/O Port Configuration
Most ports on the RA2 Series of MCUs can have multiple peripheral functions. Tools, such as the Pin Configurator in FSP, are available from Renesas to assist with port selection for each RA2 device. When several peripheral functions are needed, use the following design strategies to help with port function selection. - Page 26 Using the PmnPFS registers will have more configuration features available but will have slower access. Renesas FSP provides a Pin Configurator to configure the GPIO pin after reset as shown in Figure 19. After the GPIO is configured, it can be controlled using HAL layer APIs in FSP.
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Page 27: Internal Pull-Ups
Renesas RA Family RA2 Quick Design Guide 9.2.1 Internal Pull-Ups • Most pins on ports 0 through 9 can enable a pull-up resistor. The pull-up is controlled by the Pull-Up bit (PCR) bit in each Port mn Pin Function Select (PmnPFS) Register. The PCR bit in each PmnPFS register controls the corresponding pin on the port. -
Page 28: Setting Up And Using Irq Pins
• Figure 20 shows an example of enabling SPI0 pins using FSP Pin configuration. Figure 20. Enabling SPI0 pins using Pin Configurator in Renesas FSP 9.4 Setting Up and Using IRQ Pins • Certain port pins can be used as hardware interrupt lines (IRQ). See the “Peripheral Select Settings for each Product”... - Page 29 IRQ Pin Digital Filter Setting (FCLKSEL[1:0]) bits in the IRQCRi register for each IRQ. • Figure 21 and Figure 22 show examples of enabling and configuring IRQ pins using Renesas FSP. Figure 21. Enable P004 as IRQ03 input using Pin Configurator in Renesas FSP R01AN6060EU0100 Rev.1.00...
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Page 30: Unused Pins
Renesas RA Family RA2 Quick Design Guide Figure 22. Configure IRQ03 using Renesas FSP Configurator 9.5 Unused Pins Note: Some pins require specific termination: See the “Handling of Unused Pins” section of the Hardware User’s Manual for specific recommendations. Unused pins that are left floating can consume extra power and leave the system more susceptible to noise problems. -
Page 31: Nonexistent Pins
‘0’ to the corresponding bit in the MSTPCRi register. Peripherals may be stopped by writing a ‘1’ to the proper bit in the MSTPCRi register. HAL drivers in Renesas FSP handle module start/stop function automatically. 11. Interrupt Control Unit The Interrupt Controller Unit (ICU) controls which event signals are linked to the Nested Vector Interrupt Controller (NVIC) and Data Transfer Control (DTC) modules. - Page 32 Figure 24. RA2A1 ICU I/O Pins Figure 25 is an example of using a Renesas FSP configurator to enable and configure an interrupt using Renesas FSP. The ICU and interrupts are configured as part of the HAL driver configuration through FSP.
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Page 33: Low Power Consumption
Renesas RA Family RA2 Quick Design Guide Figure 25. Enable GTP0 Overflow Interrupt and Set User Callback Functions Invoked by Interrupt Service Routine 12. Low Power Consumption The RA2 devices have several functions for reducing power consumption. These include setting clock dividers, stopping modules, selecting power control mode in Normal mode, and transitions to low power modes. - Page 34 Renesas RA Family RA2 Quick Design Guide Table 11. Specifications of Low Power Mode Functions Item Specification Reducing power consumption by The frequency division ratio can be selected independently for the modifying clock signals system clock (ICLK), peripheral module clock (PCLKB, PCLKD, CLKOUT), and flash interface clock (FCLK).*...
- Page 35 The transitions to other LPMs are done by executing a WFI instruction with appropriate settings in the Standby Control register (SBYCR). Renesas FSP provides a low power mode (LPM) driver and driver configurator to set up low power mode, wake source/cancel source, and so forth.
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Page 36: Buses
Renesas RA Family RA2 Quick Design Guide /* Open LPM driver and initialize LPM mode */ err = R_LPM_Open(&g_lpm_sw_standby_ctrl, &g_lpm_sw_standby_cfg); /* Handle error */ if (FSP_SUCCESS != err) return (err); /* Transition to configured LPM mode: Deep Software Standby Mode */ err = R_LPM_LowPowerModeEnter(&g_lpm_sw_standby_ctrl);... -
Page 37: Bus Error Monitoring
Renesas RA Family RA2 Quick Design Guide Figure 28. RA2 MCU Bus Configuration 13.1 Bus Error Monitoring The monitoring system monitors each individual area. Whenever it detects an error, it returns the error to the requesting master IP using the AHB-Lite error response protocol. - Page 38 Renesas RA Family RA2 Quick Design Guide Figure 29. SDADC24 Specifications (1 of 2) R01AN6060EU0100 Rev.1.00 Page 38 of 44 Sep.14.21...
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Page 39: Operational Amplifier (Opamp) With Configurable Switches
OPAMP. Renesas FSP provides an Operational Amplifier driver and driver configurator to set up OPAMPs, pin connections, etc. Figure 31 shows an example of setting up OPAMP0 to form a voltage follower with P500, P501, P502 as plus input pin, plus minus pin, output pin respectively. -
Page 40: General Layout Practices
16. General Layout Practices 16.1 Digital Domain vs. Analog Domain Renesas RA2 Microcontroller devices have three primary types of pin functions: Power, Digital, and Analog. Generally, power pins are dedicated for voltage and reference input and do not have multiple functions. -
Page 41: High Speed Signal Design Considerations
Due to the highly multiplexed nature of the I/O pins on Renesas RA2 MCU devices, many I/O pins can be used for either analog or digital functions. This can result in situations where digital and analog functions may overlap and result in data errors. -
Page 42: References
Reference Document Number Description R01UH0888 Renesas RA2A1 Group, User’s Manual: Hardware R01UH0852 Renesas RA2E1 Group, User’s Manual: Hardware R01UH0853 Renesas RA2L1 Group, User’s Manual: Hardware R01UH0919 Renesas RA2E2 Group, User’s Manual: Hardware R01AN6060EU0100 Rev.1.00... - Page 43 Renesas RA Family RA2 Quick Design Guide Website and Support Visit the following vanity URLs to learn about key elements of the RA family, download components and related documentation, and get support. RA Product Information www.renesas.com/ra RA Product Support Forum www.renesas.com/ra/forum...
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Page 44: Revision History
Renesas RA Family RA2 Quick Design Guide Revision History Description Rev. Date Page Summary 1.00 Sep.14.21 — Initial release — — R01AN6060EU0100 Rev.1.00 Page 44 of 44 Sep.14.21... - Page 45 Renesas Electronics disclaims any and all liability for any damages or losses incurred by you or any third parties arising from the use of any Renesas Electronics product that is inconsistent with any Renesas Electronics data sheet, user’s manual or other Renesas Electronics document.
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