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Renesas R-IN32M3 Series User Manual

Renesas R-IN32M3 Series User Manual

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R-IN32M3 Series
・R-IN32M3-EC
・R-IN32M3-CL
All information contained in these materials, including products and product specifications, represents
information on the product at the time of publication and is subject to change by Renesas Electronics
Corp. without notice. Please review the latest information published by Renesas Electronics Corp.
through various means, including the Renesas Electronics Corp. website (http://www.renesas.com)
Document number: R18UZ0021EJ0400
Issue date: Dec. 28, 2018
Renesas Electronics
www.renesas.com
User's Manual: Board design edition

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Summary of Contents for Renesas R-IN32M3 Series

  • Page 1 All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics Corp. without notice. Please review the latest information published by Renesas Electronics Corp.
  • Page 2 Electronics product for any application for which it is not intended. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for which the product is not intended by Renesas Electronics.
  • Page 3 Instructions for the use of product In this section, the precautions are described for over whole of CMOS device. Please refer to this manual about individual precaution. When there is a mention unlike the text of this manual, a mention of the text takes first priority. 1.Handling of Unused Pins Handle unused pins in accord with the directions given under Handling of Unused Pins in the manual.
  • Page 4 R-IN32M3 Series User’s Manual R-IN32M3-EC R18UZ0003EJ**** R-IN32M3 Series User’s Manual R-IN32M3-CL R18UZ0005EJ**** R-IN32M3 Series User’s Manual: Peripheral Modules R18UZ0007EJ**** R-IN32M3 Series Programming Manual: Driver R18UZ0009EJ**** R-IN32M3 Series Programming Manual: OS R18UZ0011EJ**** R-IN32M3 Series User’s Manual Peripheral: Board design edition This manual...
  • Page 5 Notation of Numbers and Symbols Weight in data notation: Left is high-order column, right is low-order column Active low notation: xxxZ (capital letter Z after pin name or signal name) or xxx_N (capital letter _N after pin name or signal name) or xxnx (pin name or signal name contains small letter n) Note: explanation of (Note) in the text...

  • Page 6: Table Of Contents

    Contents Outline ................................1 Definition of Pin Handling and Symbols in This Manual ................... 1 Power/Reset Pins ............................2 Power-On/Off Sequence ............................. 2 Power Supply Pins .............................. 3 Reset Pins ................................4 Clock Input Pins ............................. 5 Features of Pins ..............................5 Notes on Configuring the Oscillation Circuit .....................
  • Page 7 CC-Link Pins ..............................22 10. Notes of CC-Link IE Field Use (Only R-IN32M3-CL) .................. 24 11. External MCU/Memory Interface Pins ......................25 11.1 External MCU Interface ............................ 26 11.1.1 Asynchronous SRAM Interface Mode ..................... 27 11.1.2 Synchronous SRAM Interface Mode ....................... 29 11.1.3 Synchronous SRAM-Type Transfer Mode ....................
  • Page 8 22.5 How to Get BSDL ............................51 22.6 Notes on Using BSDL <R> ..........................51 23. IBIS Information ............................52 24. Marking Information ............................. 53 24.1 R-IN32M3-EC ..............................53 24.2 R-IN32M3-CL ..............................53 25. Thermal Design <R> ........................... 54 25.1 Deciding on whether Particular Measures for Heat Dissipation are Required ..........
  • Page 9 List of Figures Figure 1.1 Definition of GND Symbols ......................... 1 Figure 2.1 Recommended Sequence of Power-On/Off ..................2 Figure 3.1 Example of GND Pattern for the Components for External Constants ..........6 Figure 3.2 Configuration Example of the Oscillation Circuit ................7 Figure 4.1 Recommended Configuration of Filter ....................
  • Page 10 Figure 17.2 Connection between One Master and Two Slaves ................42 Figure 18.1 Connection Example of JTAG Interface (20-Pin Half-Pitch without Trace) ........43 Figure 18.2 Connection Example of JTAG Interface (20-Pin Half-Pitch with Trace) ........... 44 Figure 18.3 Connection Example of JTAG Interface (20-Pin Full-Pitch) .............. 45 Figure 19.1 Implementation Flow ..........................
  • Page 11 List of Tables Table 1.1 Definition of Pin Handling ........................1 Table 5.1 List of Recommended Parts for Use ....................... 11 Table 7.1 Parts List (100Base-TX interface) ......................16 Table 7.2 Part List (100Base-FX Interface) ......................19 Table 11.1 Mode Selection of External MCU/Memory Connection..............25 Table 22.1 List of BSCAN Non-Supported Pins<R>...

  • Page 12: Outline

    This manual is intended for being used by engineers that work on a circuit and PCB design that is equipped with an Ethernet communication LSI from the R-IN32M3 series made by Renesas Electronics. Target devices are the R-IN32M3-EC and R-IN32M3-CL devices.

  • Page 13: Power/Reset Pins

    Power/Reset Pins Power-On/Off Sequence Power structure of the R-IN32M3 series is internal power (VDD10: 1.0V) and I/O power (VDD33: 3.3V) and PHY power supply (VDD15: 1.5V). (PHY power is subject only R-IN32M3-EC.) Power is recommended to put the I/O power after switching on the internal power supply. In addition, power-off is recommend internal power-off after cut-off of I/O power (see section 2.1, Power-On/Off Sequence).

  • Page 14: Power Supply Pins

    R-IN32M3 Series: Board design edition 2. Power/Reset Pins Power Supply Pins This is a list of power supply pins of the R-IN32M3. Connect these pins according to the description given in the "Connection Example" column. Terminal Name Feature Connection Example PLL_VDD PLL voltage (VDD) (1.0 V)

  • Page 15: Reset Pins

    R-IN32M3 Series: Board design edition 2. Power/Reset Pins Reset Pins This is a list of reset pins of R-IN32M3. As a width at low level of at least 100 ms is required for the reset input signals, secure this by applying the low level of the reset signal over the oscillation stabilization time of the external oscillator (25 MHz).

  • Page 16: Clock Input Pins

    R-IN32M3 Series: Board design edition 3. Clock Input Pins Clock Input Pins Features of Pins The following table shows the pin functions for clock supply to the device. Pin Name Features ・External resonator connection pin. ・When external clock input mode is used (OSCTH = 1), set XT1 to the low level.

  • Page 17: Notes On Configuring The Oscillation Circuit

    3. Clock Input Pins Notes on Configuring the Oscillation Circuit As the R-IN32M3 series includes an oscillation block, oscillation circuits are easily configurable by externally connecting a resonator and components for external constants. Though configuring an oscillation circuit is easy, the configured circuit is analog and operates at a high frequency, so notes that differ for logic become applicable.

  • Page 18: Oscillation Circuit Configuration Example

    Caution. The input of the R-IN32M3 is fixed to 25 MHz. When a resonator is to be used, contact the resonator manufacturer and ask for a corresponding part number and external constants. Renesas recommends the following oscillator and resonator manufacturers. • Nihon Dempa Kogyo Co., Ltd. (NDK) URL: http://www.ndk.com/en/index.html •...

  • Page 19: Pll Power Pins

    R-IN32M3 Series: Board design edition 4. PLL Power Pins PLL Power Pins The PLL circuit is susceptible to noise. To reduce the influence of noise, it is recommended to place filters in the power supply pin of the PLL. Also if user avoid the interference noise of the PLL board and power supply, the usage of user ferrite beads (FB).

  • Page 20: Notes On Placement Of Peripheral Components

    R-IN32M3 Series: Board design edition 4. PLL Power Pins Notes on Placement of Peripheral Components The 0.1-µF ceramic capacitor (C1) should be placed immediately close to R-IN32M3 (in the immediate vicinity of the pin). Figure 4.2 is a schematic view from below the board.

  • Page 21: Built-In Regulator Pin (R-In32M3-Ec Only)

    R-IN32M3 Series: Board design edition 5. Built-in Regulator Pin (R-IN32M3-EC only) Built-in Regulator Pin (R-IN32M3-EC only) In the R-IN32M3-EC, supplying 1.5 V to the VDD15, VDDAPLL, and PxVDDARXTX (x = 0, 1) pins is required as an internal power supply for Ethernet PHY.

  • Page 22: Figure 5.2 Layout Example Of The Regulator Section

    R-IN32M3 Series: Board design edition 5. Built-in Regulator Pin (R-IN32M3-EC only) R-IN32M3 AVDD, BVDD pattern Switchi ng regulator inpu t BVDD LX pattern L1: 10 uH VOUT pattern Regula tor output 1.5V (Conne ction to VDD15 power plan e) C1: 22uF (Tantalum)

  • Page 23: Built-In Regulator Unused

    R-IN32M3 Series: Board design edition 5. Built-in Regulator Pin (R-IN32M3-EC only) Built-in Regulator Unused When the built-in regulator is not in use, make wiring and layout as follows. R-IN32M3-EC Switching regulator input AVDD_REG VDD33 (3.3 V) Switching regulator input BVDD Regulator output 1.5 V...

  • Page 24: Gpio Port Pins

    R-IN32M3 Series: Board design edition 6. GPIO Port Pins GPIO Port Pins GPIO is a general-purpose I/O port. As for the internal configuration, see the section in the following document. R-IN32M3-EC: User’s Manual R-IN32M3-EC "2.3.6 Port Signals" R-IN32M3-CL: User’s Manual R-IN32M3-CL "2.5.6 Port Signals"...

  • Page 25: Ethernet Phy Pins (R-In32M3-Ec Only)

    R-IN32M3 Series: Board design edition 7. Ethernet PHY Pins (R-IN32M3-EC Only) Ethernet PHY Pins (R-IN32M3-EC Only) Ethernet PHY Power Supply Pins As for analog power supply pins for the built-in Ethernet PHY of the R-IN32M3-EC, power separation by ferrite beads (FB) and the configuration of filters as follows are recommended.

  • Page 26: 100Base-Tx Pins

    R-IN32M3 Series: Board design edition 7. Ethernet PHY Pins (R-IN32M3-EC Only) 100Base-TX Pins This is an example of connection using the pulse transformer. Note1 Note1 3.3 V 3.3 V R1 R2 R3 R4 R5 R6 RJ-45 R-IN32M3-EC (Pulse transfor me r in corp orated)

  • Page 27: Figure 7.3 Connection Example Of R-In32M3-Ec, Pulse Transformer, And Rj-45 Connector

    R-IN32M3 Series: Board design edition 7. Ethernet PHY Pins (R-IN32M3-EC Only) No te1 No te1 3.3V 3.3V R-IN32M3-EC Transfo rmer RJ-45 Px_TX_P Px_TX_N Px_RX_P Px_RX_N Shie ld 10 nF / 2 kV No te2 No te2 No te2 No te2 Figure 7.3 Connection Example of R-IN32M3-EC, Pulse Transformer, and RJ-45 Connector...

  • Page 28: Figure 7.4 Wiring Example Of The Differential Signal Transmission Line (1)

    R-IN32M3 Series: Board design edition 7. Ethernet PHY Pins (R-IN32M3-EC Only) The wiring on the board, note the following. • Long wires should be avoided. R-IN32M3 and, the transformer, and the connector should be placed together as close as possible.

  • Page 29: Figure 7.5 Wiring Example Of The Differential Signal Transmission Line (2)

    R-IN32M3 Series: Board design edition 7. Ethernet PHY Pins (R-IN32M3-EC Only) Figure 7.5 Wiring Example of the Differential Signal Transmission Line (2) void void Figure 7.6 Wiring Example of the Differential Signal Transmission Line (3) R18UZ0021EJ0400 Page 18 of 64...

  • Page 30: 100Base-Fx Pins (Optical Fiber)

    R-IN32M3 Series: Board design edition 7. Ethernet PHY Pins (R-IN32M3-EC Only) 100Base-FX Pins (Optical Fiber) An example of a connection with an optical fiber module is indicated below. As for the notes of the differential signal transmission line, refer to "7.2 100Base-TX Pins".

  • Page 31: Gmii Pins (R-In32M3-Cl Only)

    R-IN32M3 Series: Board design edition 8. GMII Pins (R-IN32M3-CL Only) GMII Pins (R-IN32M3-CL Only) Figure 8.1 shows a connection image of R-IN32M3-CL and Gigabit Ethernet PHY. The value of damping resistors should be 33Ω within a tolerance of 5%, and the damping resistors should be put in the nearest point of the R-IN32M3-CL.

  • Page 32: Selection Of Gmii Peripheral Components

    R-IN32M3 Series: Board design edition 8. GMII Pins (R-IN32M3-CL Only) Selection of GMII Peripheral Components Select the parts with care to the following. • Selection of PHY Full-duplex products IEEE802.3 1000BASE-T. Parts that have the auto-negotiation function. Parts with a GMII interface.

  • Page 33: Cc-Link Pins

    R-IN32M3 Series: Board design edition 9. CC-Link Pins CC-Link Pins The connection example for CC-Link Remote device station is shown in Figure 9.1. For notes on the implementation of the CC-Link, refer to CC-Link Specifications: Implementation Specification (BAP-05027) issued by the CC-Link Partner Association. Please contact the CC-Link Partner Association (CLPA) with any requests for the corresponding material.

  • Page 34: Figure 9.1 Connection Example For Cc-Link Remote Device Station

    R-IN32M3 Series: Board design edition 9. CC-Link Pins SN75ALS181SN R-IN32M3 47 k 35605-5153-B00 PE MC177050-A401 CCS_RD (P53) Note2 CCS_WDTZ (P13) RDENL (Pxx) CCS_MON7 (P05) 47 k CCS_SDGATEON (P52) 3300 pF CCS_MON6 (P04) 50 V CCS_MON5 (P03) CCS_SD (P54) CCS_MON4 (P11)

  • Page 35: Notes Of Cc-Link Ie Field Use (Only R-In32M3-Cl)

    R-IN32M3 Series: Board design edition 10. Notes of CC-Link IE Field Use (Only R-IN32M3-CL) Notes of CC-Link IE Field Use (Only R-IN32M3-CL) When booting in external memory boot mode, external serial flash ROM boot mode, and instruction RAM boot mode, drive the P33 (multiplexed with CCI_WAITEDGEH) and P34 (multiplexed with CCI_WRLENH) pins high during a reset.

  • Page 36: External Mcu/Memory Interface Pins

    R-IN32M3 Series: Board design edition 11. External MCU/Memory Interface Pins External MCU/Memory Interface Pins This LSI is able to connect to an external MCU or memory. The connection mode is decided by the signal level of the MEMIFSEL, MEMCSEL, HIFSYNC, and ADMUXMODE pins as shown in Table 11.1.

  • Page 37: External Mcu Interface

    R-IN32M3 Series: Board design edition 11. External MCU/Memory Interface Pins 11.1 External MCU Interface The external MCU interface is multiplexed with the external memory interface. When the MEMIFSEL pin is set to the high level, it functions as the external MCU interface.

  • Page 38: Asynchronous Sram Interface Mode

    R-IN32M3 Series: Board design edition 11. External MCU/Memory Interface Pins 11.1.1 Asynchronous SRAM Interface Mode The following figure shows a general connection example in asynchronous SRAM interface mode, when this LSI chip is connected as a slave device to an external MCU.
  • Page 39 R-IN32M3 Series: Board design edition 11. External MCU/Memory Interface Pins 4. This is a chip-select signal supporting paged access. Connect it if required. 5. Connected the address signal for a 4-byte boundary from the destination to the HA2 pin of this LSI.

  • Page 40: Synchronous Sram Interface Mode

    R-IN32M3 Series: Board design edition 11. External MCU/Memory Interface Pins 11.1.2 Synchronous SRAM Interface Mode The following figure shows a general connection example in synchronous SRAM interface mode, when this LSI chip is connected as a slave device to an external MCU.

  • Page 41: Synchronous Sram-Type Transfer Mode

    R-IN32M3 Series: Board design edition 11. External MCU/Memory Interface Pins 11.1.3 Synchronous SRAM-Type Transfer Mode The following figure shows a general connection example in synchronous SRAM-type transfer mode, when this LSI chip is connected as a slave device to an external MCU. When setting this mode, enable "address/data multiplex" function (the ADMUXMODE pin should be driven high).

  • Page 42: External Memory Interface

    R-IN32M3 Series: Board design edition 11. External MCU/Memory Interface Pins 11.2 External Memory Interface This section describes the connection as a master device to an external memory. The operating connection mode of the external memory interface depends on the level of the signal on the MEMCSEL pin (see Table 11.1).

  • Page 43: Figure 11.7 Connection Example With 32-Bit Sram (Asynchronous Sram Memc)

    R-IN32M3 Series: Board design edition 11. External MCU/Memory Interface Pins 11.2.1.1 Connection Example with SRAM The following figure shows an example when this LSI chip is connected to SRAM. R-IN32M3 A2-A19 A0-A17 D16-D31 I/O1-I/O16 CSZn SRAM (256 Kwords × 16 bits)

  • Page 44: Figure 11.9 Connection Example With 32-Bit Paged Rom (Asynchronous Sram Memc)

    R-IN32M3 Series: Board design edition 11. External MCU/Memory Interface Pins 11.2.1.2 Connection Example with Paged ROM The following figure shows an example when this LSI chip is connected to paged ROM. R-IN32M3 A2-A21 A0-A19 D16-D31 O0-O15 Paged ROM CSZ0 (1 Mword × 16 bits)

  • Page 45: Synchronous Burst Access Memc

    R-IN32M3 Series: Board design edition 11. External MCU/Memory Interface Pins 11.2.2 Synchronous Burst Access MEMC The synchronous burst access MEMC is externally connectable to paged ROM, ROM, SRAM, PSRAM, NOR-flash memory, or peripheral devices with an interface similar to the SRAM interface via a 16- or 32-bit bus.

  • Page 46: Figure 11.11 Connection Example With 32-Bit Sram (Synchronous Burst Access Memc)

    R-IN32M3 Series: Board design edition 11. External MCU/Memory Interface Pins 11.2.2.1 Connection Example with SRAM The following figure shows an example when this LSI chip is connected to SRAM. R-IN32M3 BUSCLK BUSCLK Note Note A2-A19 A0-A17 D16-D31 I/O1-I/O16 SRAM CSZn (256 Kwords ×...

  • Page 47: Figure 11.13 Connection Example With 32-Bit Paged Rom (Synchronous Burst Access Memc)

    R-IN32M3 Series: Board design edition 11. External MCU/Memory Interface Pins 11.2.2.2 Connection Example with Paged ROM The following figure shows an example when this LSI chip is connected to paged ROM. R-IN32M3 BUSCLK BUSCLK Note Note A2-A21 A0-A19 Paged ROM...

  • Page 48: Serial Flash Rom Connection Pins

    R-IN32M3 Series: Board design edition 12. Serial Flash ROM Connection Pins Serial Flash ROM Connection Pins This LSI chip has a memory controller to connect the serial flash ROM that supports the SPI compatible interface. R-IN32M3 SMCSZ (P17) /S (/CS)

  • Page 49: Asynchronous Serial Interface J Connection Pins

    R-IN32M3 Series: Board design edition 13. Asynchronous Serial Interface J Connection Pins Asynchronous Serial Interface J Connection Pins Figure 13.1 shows a connection example between the R-IN32M3 and the asynchronous serial interface J (UARTJn) device. R-IN32M3 UART device TXD0（P21） RXD0（P20）...

  • Page 50: I 2 C Connection Pins

    R-IN32M3 Series: Board design edition 14. I2C Connection Pins C Connection Pins Figure 14.1 shows a connection example between the R-IN32M3 and the I C slave device. Since the serial clock line and serial data line are N-ch. open drain outputs, external pull-up resistors are required.

  • Page 51: Ethercat Eeprom I C Connection Pins (R-In32M3-Ec Only)

    R-IN32M3 Series: Board design edition 15. EtherCAT EEPROM I2C Connection Pins (R-IN32M3-EC Only) EtherCAT EEPROM I C Connection Pins (R-IN32M3-EC Only) ® In the case of using the EtherCAT protocol, the user needs to connect to the external EEPROM with the dedicated EEPROM I C connection pins.

  • Page 52: Can Pins

    R-IN32M3 Series: Board design edition 16. CAN Pins CAN Pins Figure 16.1 shows a connection example between the R-IN32M3 and the CAN transceiver. The CAN transceiver is used to connect the CAN bus. R-IN32M3 CAN transceiver CAN bus CTXDn CAN_H...

  • Page 53: Csih Pins

    R-IN32M3 Series: Board design edition 17. CSIH Pins <R> CSIH Pins <R> Examples of connections of an R-IN32M3 with a CSI master and slave are given below. 17.1 One Master and One Slave The following figure illustrates the connections between one master and one slave.

  • Page 54: Jtag/Trace Pins

    R-IN32M3 Series: Board design edition 18. JTAG/Trace Pins JTAG/Trace Pins The following figures show examples when this LSI chip is connected to the ICE (in-circuit emulator). They are examples when connected to the 20-pin half-pitch connecter or 20-pin full-pitch connecter of standard.

  • Page 55: Figure 18.2 Connection Example Of Jtag Interface (20-Pin Half-Pitch With Trace)

    R-IN32M3 Series: Board design edition 18. JTAG/Trace Pins VDD33 (3.3 V) Reset circu it Abo ut 4.7kΩ to 10kΩ R-IN32M3 ICE conne ctor (20-pin hal f-pitch) RESETZ nRESE T HOTRE SETZ Wired OR con nectio n with ope n d rain...

  • Page 56: Figure 18.3 Connection Example Of Jtag Interface (20-Pin Full-Pitch)

    R-IN32M3 Series: Board design edition 18. JTAG/Trace Pins VDD33 (3.3 V) Reset circu it About 4.7kΩ to 10kΩ ICE conne ctor (20-pin full-pitch) R-IN32M3 RESETZ nSRST HOTRE SETZ Wired OR connection with open drain TRS TZ nTRST JTA GSEL HOTRESETZ is incorporated only in the R-IN32M3-CL.

  • Page 57: Implementation Conditions

    R-IN32M3 Series: Board design edition 19. Implementation Conditions Implementation Conditions Figure 19.1 and Figure 19.2 show implementation conditions of the R-IN32M3. Ope n the aluminu m dry pack Storage pe riod is Baking with in 7 days. * (125°C, 20 to 75h) * Storage cond ition s: 30°C o r less tempera tur e,...

  • Page 58: Package Information

    R-IN32M3 Series: Board design edition 20. Package Information Package Information Figure 20.1 shows the package information. 324-PIN PLASTIC BGA (19x19) V U T R P N M L K J H G F E D C B A INDEX MARK...

  • Page 59: Mount Pad Information

    R-IN32M3 Series: Board design edition 21. Mount Pad Information Mount Pad Information Figure 21.1 shows the mount pad information. 0.50 to 0.70 mm 1.00 mm 0.45 to 0.55 mm 1.00 mm 0.45 to 0.55 mm Figure 21.1 Mount Pad Sizes...

  • Page 60: Bscan Information

    R-IN32M3 Series: Board design edition 22. BSCAN Information BSCAN Information R-IN32M3 provides the BSDL file. Caution. If the other device is connected to an input pin without the pin being pulled up or down, clamp the level on the board or set the logic in the other device.

  • Page 61: Bscan Non-Supported Pins

    R-IN32M3 Series: Board design edition 22. BSCAN Information 22.4 BSCAN Non-Supported Pins The following pins do not support BSCAN. Table 22.1 List of BSCAN Non-Supported Pins<R> R-IN32M3-CL R-IN32M3-EC PONRZ PONRZ JTAGSEL JTAGSEL TMODE0 TMODE0 TMODE1 TMODE1 TMODE2 TMODE2 TRSTZ TRSTZ...

  • Page 62: How To Get Bsdl

    R-IN32M3 Series: Board design edition 22. BSCAN Information 22.5 How to Get BSDL With regard to obtain the BSDL file, please contact a Renesas Sales Representative or Distributor in your area. 22.6 Notes on Using BSDL <R> When the BSDL file is used, the control cell that is not used on the BSDL may cause the following errors. When the error occurs, treat it as a pseudo error.

  • Page 63: Ibis Information

    R-IN32M3 Series: Board design edition 23. IBIS Information IBIS Information Please obtain the IBIS information from the following website. https://www.renesas.com/en-us/products/factory-automation/multi-protocol-communication.html R18UZ0021EJ0400 Page 52 of 64 Dec. 28, 2018...

  • Page 64: Marking Information

    R-IN32M3 Series: Board design edition 24. Marking Information Marking Information 24.1 R-IN32M3-EC Product name: MC-10287BF1-HN4-A, MC-10287BF1-HN4-M1-A R-IN32M3-EC MC-10287BF1 Assembly lot number Country assembled PB free mark Index mark Figure 24.1 R-IN32M3-EC Marking Information 24.2 R-IN32M3-CL Product name: UPD60510BF1-HN4-A, UPD60510BF1-HN4-M1-A R-IN32M3-CL...

  • Page 65: Thermal Design

    25.1.2 Estimating Power Consumption For the 3.3-V sub-systems, estimate the power consumption from the value for current on the R-IN32M3 Series Data Sheet. Since it is temperature dependent, the power consumption of the 1.0-V sub-systems is estimated from the following formula according to the operating temperature.

  • Page 66: Thermal Resistances Under The Jedec Conditions (For Θja And Ψjt)

    R-IN32M3 Series: Board design edition 25. Thermal Design <R> Thermal Resistances under the JEDEC Conditions (for θja and Ψjt) 25.1.3 The thermal resistances under the JEDEC-2S2P conditions are as follows. However, these values are for the devices alone; care is required since the actual thermal resistances will depend on the board, casing, and peripheral components.
  • Page 67 R-IN32M3 Series: Board design edition 25. Thermal Design <R> (2) R-IN32M3-CL θja [°C/W] Tj [°C] Power Consumption by 1-V Sub-Systems [mW] 14.9 14.9 Ta [°C] (JEDEC) (JEDEC) -34.6 -32.8 -30.9 -29.0 -29.6 -27.6 -25.8 -23.8 -24.5 -22.5 -20.6 -18.6 -19.4 -17.4...

  • Page 68: Relation Between Temperature Increases (∆T) And Thermal Resistance (Θja) At A Given Ambient

    R-IN32M3 Series: Board design edition 25. Thermal Design <R> Relation between Temperature Increases (∆t) and Thermal Resistance (θja) at a 25.1.5 Given Ambient Temperature The thermal resistance (θja) depends on the board, casing, and peripheral components. If respective criteria for the temperature rise (Δt = Tt - Ta) apply to the end product, refer to the graph below that shows the required θja to reach the...

  • Page 69: Examples Of Measures For Heat Dissipation

    R-IN32M3 Series: Board design edition 25. Thermal Design <R> 25.2 Examples of Measures for Heat Dissipation We classify measures for heat dissipation into two types. For details, see the following pages. (1) Measures for heat release in designing the board •...

  • Page 70: Measures For Heat Release In Designing The Board

    R-IN32M3 Series: Board design edition 25. Thermal Design <R> 25.2.1 Measures for Heat Release in Designing the Board (1) Thermal Vias Placing as many vias to the power supply and GND areas as possible below the center of the package increases the number of paths for the flow of heat in the z direction.
  • Page 71 R-IN32M3 Series: Board design edition 25. Thermal Design <R> (3) Increase the Number of Board Layers, and Bring the GND Pattern out to the Surface Layer Increasing the number of Cu wiring layers in the printed circuit board expands the area for hear release. Where possible, place areas of the GND pattern on the surface layer and connect them to the main GND pattern via thermal vias.

  • Page 72: Heat Dissipation From The Periphery (Including The Casing)

    R-IN32M3 Series: Board design edition 25. Thermal Design <R> 25.2.2 Heat Dissipation from the Periphery (Including the Casing) (1) Incorporating a Heat Sink Incorporating a heat sink increases the area for heat dissipation, making heat dissipation from the surface of the device more efficient.

  • Page 73: Points For Caution

    R-IN32M3 Series: Board design edition 25. Thermal Design <R> 25.3 Points for Caution This section describes points of incorrect design that may lead to abnormal heating. 25.3.1 Internal Regulator The 1.5V regulator incorporated in the R-IN32M3-EC requires an external smoothing circuit. This smoothing circuit not operating stably (e.g.
  • Page 74 R-IN32M3 Series: Board design edition 25. Thermal Design <R> R18UZ0021EJ0400 Page 63 of 64 Dec. 28, 2018...

  • Page 75: Countermeasure For Noise

    If the BUSCLK pin is not in use, output on the pin from an R-IN32M3 can be stopped. See section 2.2.2, Clock Control Registers (CLKGTD0, CLKGTD1) in the R-IN32M3 Series User’s Manual: Peripheral Modules regarding control of the GCBCLK bit in the CLKGTD0 register, which enables or disables output from the BUSCLK pin.
  • Page 76 R-IN32M3 Series: Board design edition Revision History REVISION HISTORY R-IN32M3 Series User’s Manual (Board design edition) Rev. Date Description Page Summary 1.00 Jul 26, 2013 First edition issued 1.01 Dec 02, 2013 10,12 Add the TEST pin processing Add “ 9. Notes of CC-Link IE FIeld user (only R-IN32M3-CL)”...
  • Page 77 R-IN32M3 Series: Board design edition Revision History Rev. Date Description Page Summary 3.00 Feb. 28, 2017 5.1 Built-in Regulator Used Pin handling and the GND description in Figure 5.1 were modified. The description on the capacitor substitution method was added.
  • Page 78 R-IN32M3 Series: Board design edition Revision History Rev. Date Description Page Summary 3.00 Feb. 28, 2017 11.2 External Memory Interface As it was not needed, the description on the MEMIFSEL pin was deleted. 11.2.1.1 Connection Example with SRAM Remarks in Figure 11.7 and Figure 11.8 were moved to outside of the figure frame.
  • Page 79 R-IN32M3 Series: Board design edition Revision History Rev. Date Description Page Summary 4.00 Dec. 28, 2018 Table 22.1 List of BSCAN Non-Supported Pins FB, P0_SD_N, and P1_SD_N were added in the R-IN32M3-EC. 22.6 Notes on Using BSDL The description on notes on using BSDL was added.
  • Page 80 R-IN32M3 Series: Board design edition Revision History [Memo] R18UZ0021EJ0400 C - 5 Dec. 28, 2018...
  • Page 81 R-IN32M3 Series User’s Manual: Board design edition Publication Date: Rev.1.00 Jul. 26, 2013 Rev.4.00 Dec. 28, 2018 Published by: Renesas Electronics Corporation...
  • Page 82 R-IN32M3 Series User’s Manual Board design edition R18UZ0021EJ0400...
  • Page 83 SALES OFFICES Refer to "http://www.renesas.com/" for the latest and detailed information. California Eastern Laboratories, Inc. 4590 Patrick Henry Drive, Santa Clara, California 95054-1817, U.S.A. Tel: +1-408-919-2500, Fax: +1-408-988-0279 Renesas Electronics Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K...

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