Renesas R-IN32M3 Series User Manual page 158

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R-IN32M3-EC User's Manual
7.
Ethernet PHY Function
7.1
Features
The R-IN32M3-EC supports 10BASE-T, 100BASE-TX/FX, and integrated IEEE802.3 dual-port Ethernet physical layer
(PHY). It is possible to connect twisted-pair (UTP) cable by the external pulse transformer or connect optical fiber by the
optical transceiver. It also supports Daisy chain structure and ring structure used by industry network.
10BASE-T, 100BASE-TX, and 100BASE-FX of based upon IEEE802.3
2 ports
Auto-negotiation
Full-duplex transmission and a half-duplex transmission
Automatic MDI/MDI-X
Serial management interface (MDC/MDIO)
Low latency function
Quick auto-negotiation
Cable diagnosis function
Fast link-loss detection function (BER monitor, FEQ monitor)
Caution 1: When using the EtherCAT slave controller, use 100BASE-TX because it doesn't support
100BASE-FX.
2: EtherCAT P is not supported.
7.2
Special Functions
7.2.1
Low Latency Function
It is possible to shorten the latency time for the Ethernet frame passing through PHY from the LINE interface to the MII
interface (low latency mode). Ethernet frame starts from preamble while this preamble starts from symbol 11000 (J) and
10001 (K) of symbol (5B) of LINE. In the devices generally based on Ethernet, it is recognized as start preamble by
detecting symbol J and K. In low latency mode, it is recognized as start preamble by detecting symbol J only. This means
that the RX_DV signal is asserted at this moment and it becomes possible to shorten the latency 40 ns. If symbol J is
incorrectly detected by a bit error, the RX_ER signal is asserted and the receiver will continue when symbol K in the
following is not received.
The low latency mode becomes effective by setting bit 1 (RX_DV_J2T bit) in register 31 to 1.
1010 1010 1010 1010 1010 1010 1010 1010 1010 1010 1010 1010 1010 1010 1010 1010 ←MII data
IDLE
11111 11000 10001 10110 10110 10110 10110 10110 10110 10110 10110 10110 10110 10110 10110 10110 10111 ←LINE data
J
K
Preamble + SFD
Figure 7.1 Preamble of Ethernet Frames
R18UZ0003EJ0501
Jan. 12, 2021
<R>
Dest.Addr.
Source Addr.
7. Ethernet PHY Function
Length
Payload
FCS
←Ethernet frame
Page 145 of 224

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