Dc_Cyc_Start_Time - Renesas R-IN32M3 Series User Manual

R-IN32M3-EC User's Manual
6.20.4.6 Start Time Cyclic Operation/Next SYNC0 Pulse Register

(DC_CYC_START_TIME)

DC_CYC_START_TIME sets the start time of cyclic operation when written, and indicates the system time of next
SYNC0 pulse when read.
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
DC_CYC_
START_
TIME
ECAT R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W)
PDI R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
ECAT
R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W)
PDI R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W) R/(W)
Bit Position Bit Name
63 to 0 STATIM
Remarks 1. Writing to this register depends on the setting of bit 0 in the cyclic unit control register
(DC_CYC_CONT: 0x0980). Writing is enabled only when bit 0 in the SYNC activation register
(DC_ACT: 0x0981) is 0.
2. While the auto-activation is enabled, if only lower 32 bits are written within one frame, upper
32 bits are automatically extended.
R18UZ0003EJ0501
Jan. 12, 2021
STATIM
STATIM
Write: The start time (system time) of cyclic operation is set in ns.
Read: The system time of next SYNC0 pulse is indicated in ns.
6. EtherCAT Slave Controller Function
8 7 6 5 4 3
Description
Address
400E 0990H
Initial Value
0000 0000
0000 0000H
2 1 0
Page 130 of 224