Renesas R-IN32M3 Series User Manual page 77

R-IN32M3-EC User's Manual
6.6 Peripheral Function Registers
6.6.1 EtherCAT PHY Offset Address Setting Register (CATOFFADD)
CATOFFADD sets the offset address of PHY when using EtherCAT.
This register can be read/written in 32-bit or 16bit units.
Caution: This register can be written only when releasing protection by the specific sequence with
the system protect command register (SYSPCMD). Refer to the system protect command
register (SYSPCMD) for protection releasing procedure. In addition, the special sequence is
not necessary for reading the value from this register. For details on the system protect
command register (SYSPCMD), see the R-IN32M3 Series User's Manual (Peripheral
Modules).
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
CATOFFADD 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0
R/W
Bit Position Bit Name
OADD4 to
4 to 0
OADD0
R18UZ0003EJ0501
Jan. 12, 2021
0 0 0 0 0 0 0 0 0
Set the PHY offset address for EtherCAT.
6. EtherCAT Slave Controller Function
0 0 0 0 0 0 0 0 0
Description
8 7 6 5 4 3 2 1 0
0 R/W R/W R/W R/W R/W
0 0 0
Page 64 of 224
Address
BASE + 0620H
Initial Value
0000 0000H