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TMS320F2803 Series
Texas Instruments TMS320F2803 Series Manuals
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Texas Instruments TMS320F2803 Series manual available for free PDF download: User Manual
Texas Instruments TMS320F2803 Series User Manual (85 pages)
Piccolo Local Interconnect Network LIN Module
Brand:
Texas Instruments
| Category:
Control Unit
| Size: 0 MB
Table of Contents
Table of Contents
3
Preface
7
Introduction and Features
9
Purpose
9
Features
9
Block Diagram
10
Standards
11
SCI/BLIN Block Diagram
11
Operation
12
Message Frame
12
LIN Protocol Message Frame Format: Master Header and Slave Response
12
Header Fields: Synch Break, Synch, and ID
12
Synchronizer
13
Response Format of LIN Message Frame
13
Response Length with SCIFORMAT(18-16) Programming
13
Baud Rate
14
Header Generation
14
Message Header in Terms of T
15
ID Field
15
Measurements for Synchronization
16
Synchronization Validation Process and Baud Rate Adjustment
17
Extended Frames Handling
18
Optional Embedded Checksum in Response for Extended Frames
18
Timeout Control
19
Checksum Compare and Send for Extended Frames
19
Timeout Values in T
19
Bit Units
19
TXRX Error Detector (TED)
20
TXRX Error Detector
21
Classic Checkbyte Generation at Transmitting Node
22
LIN 2.0-Compliant Checkbyte Generation at Transmitting Node
22
Message Filtering and Validation
23
ID Reception, Filtering and Validation
23
Receive Buffers
24
2.10 Transmit Buffers
25
Receive Buffers
25
Interrupts
26
Transmit Buffers
26
General Interrupt Scheme
27
SCI/BLIN Interrupts
27
Low-Power Mode
28
Interrupt Generation for Given Flags
28
LIN Message Frame Showing LIN Interrupt Timing and Sequence
28
Entering Sleep Mode
29
Wakeup
29
Wakeup Timeouts
30
Emulation Mode
30
Wakeup Signal Generation
30
SCI/BLIN Control Registers
31
LIN Registers
31
SCI Global Control Register 0 (SCIGCR0)
32
SCI Global Control Register (SCIGCR1)
32
SCI Global Control Register (SCIGCR2)
32
SCI Set Interrupt Register (SCISETINT)
32
SCI Clear Interrupt Register (SCICLEARINT)
33
SCI Set Interrupt Level Register (SCISETINTLVL)
33
SCI Clear Interrupt Level Register (SCICLEARINTLVL)
34
SCI Flags Register (SCIFLR)
34
SCI Interrupt Vector Offset 0 (SCIINTVECT0)
34
SCI Interrupt Vector Offset 1 (SCIINTVECT1)
34
SCI Format Control Register (SCIFORMAT)
35
Baud Rate Selection Register (BRSR)
35
Transmit Data Buffer Register (SCITD)
35
LIN Mask Register (LINMASK)
36
SCI Pin I/O Control Register 2 (SCIPIO2)
36
LIN Compare Register (LINCOMPARE)
36
LIN Receive Buffer 0 Register (LINRD0)
36
LIN Receive Buffer 1 Register (LINRD1)
36
LIN Identification Register (LINID)
37
LIN Transmit Buffer 0 Register (LINTD0)
37
LIN Transmit Buffer 1 Register (LINTD1)
37
Maximum Baud Rate Selection Register (MBRS)
37
I/O Design for Test Control (IODFTCTRL) Register
38
SCI Global Control Register 0 (SCIGCR0)
39
SCI Global Control Register (SCIGCR1)
39
SCI Global Control Register 0 (SCIGCR0) Field Descriptions
39
SCI Global Control Register (SCIGCR1) Field Descriptions
40
Bit
44
SCI Global Control Register (SCIGCR2)
44
SCI Receiver Status Flags
44
SCI Transmitter Status Flags
44
SCI Global Control Register (SCIGCR2) Field Descriptions
44
SCI Set Interrupt Register (SCISETINT)
46
SCI Set Interrupt Register (SCISETINT) Field Descriptions
46
SCI Clear Interrupt Register (SCICLEARINT)
50
SCI Clear Interrupt Register (SCICLEARINT) Field Descriptions
50
SCI Set Interrupt Level Register (SCISETINTLVL)
54
SCI Set Interrupt Level Register (SCISETINTLVL) Field Descriptions
54
SCI Clear Interrupt Level Register (SCICLEARINTLVL)
57
SCI Clear Interrupt Level Register (SCICLEARINTLVL) Field Descriptions
57
SCI Flags Register (SCIFLR)
61
SCI Flags Register (SCIFLR) Field Descriptions
61
SCI Interrupt Vector Offset 0 (SCIINTVECT0)
67
SCI Interrupt Vector Offset 0 (SCIINTVECT0) Field Descriptions
67
SCI Interrupt Vector Offset 1 (SCIINTVECT1)
68
SCI Interrupt Vector Offset 1 (SCIINTVECT1) Field Descriptions
68
SCI Format Control Register (SCIFORMAT) Field Descriptions
68
Baud Rate Selection Register (BRSR)
69
Receiver Emulation Data Buffer (SCIED)
70
Baud Rate Selection Register (BRSR) Field Descriptions
70
SCI Data Buffers (SCIED, SCIRD, SCITD)
70
Receiver Data Buffer (SCIRD)
71
Receiver Emulation Data Buffer (SCIED) Field Descriptions
71
Receiver Data Buffer (SCIRD) Field Descriptions
71
Transmit Data Buffer Register (SCITD) Field Descriptions
72
SCI Pin I/O Control Register 2 (SCIPIO2) Field Descriptions
72
LIN Compare Register (LINCOMPARE) Field Descriptions
73
LIN Receive Buffer 0 Register (LINRD0) Field Descriptions
74
LIN Receive Buffer 1 Register (LINRD1) Field Descriptions
75
LIN Mask Register (LINMASK) Field Descriptions
75
LIN Identification Register (LINID) Field Descriptions
76
LIN Transmit Buffer 0 Register (LINTD0) Field Descriptions
77
LIN Transmit Buffer 1 Register (LINTD1) Field Descriptions
77
6.23 I/O Design for Test Control (IODFTCTRL) Register
78
Maximum Baud Rate Selection Register (MBRS) Field Descriptions
78
I/O Design for Test Control (IODFTCTRL) Register Field Descriptions
79
BLIN SCI Vs. Standard SCI
81
SCI Vs. LIN-SCI Programming
81
Appendix A Revision History
84
Revision a Changes
84
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