BCM1250/BCM1125/BCM1125H
DMA Configurations .................................................................................................................................156
Descriptor Count Watermarks .............................................................................................................157
Completion Interrupts ..........................................................................................................................158
ASIC Mode Transfers ..........................................................................................................................159
Option and Flag Bits for Ethernet MACs ............................................................................................171
Control and Flag Bits for Synchronous Serial Interface.......................................................................174
Data Mover ................................................................................................................................................176
Data Mover Operation .........................................................................................................................176
CRC and Checksum Generators.........................................................................................................178
Checksum Generation..................................................................................................................178
CRC Generation...........................................................................................................................179
Examples......................................................................................................................................181
Data Mover Control Registers .............................................................................................................184
Data Mover Descriptors.......................................................................................................................187
Introduction...............................................................................................................................................190
Memory Mapped Devices....................................................................................................................194
Configuration Space ............................................................................................................................194
PCI I/O Space......................................................................................................................................195
Legacy Interrupt Acknowledge (IACK) Space .....................................................................................199
PCI Full Access Space ........................................................................................................................199
Endian Policies .........................................................................................................................................201
Little Endian System: No Swaps .........................................................................................................201
Page
viii
B roa dcom Co rpo rat ion
User Manual
10/21/02
Document
1250_1125-UM100CB-R
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