Configuring A Chip Select Region; Address Range; Table 247: Byte Lanes For The Generic Bus - Broadcom BCM1250 User Manual

BCM1250/BCM1125/BCM1125H
Table 247 shows the byte lane correspondences for the generic bus. These are discussed in more detail in the
sections that follow.
Mode
Non Multiplex
Multiplex: ALE active
Multiplex: ALE inactive / 8 bit device
Multiplex: ALE inactive / 16 bit big endian device
Multiplex: ALE inactive / 32 bit big endian device
Multiplex: ALE inactive / 8 bit PCMCIA
Multiplex: ALE inactive / 16 bit PCMCIA
Multiplex: ALE inactive / 16 bit little endian devices
Multiplex: ALE inactive / 32 bit little endian devices
Multiplex: ALE inactive / Alternate 8 bit device
Parity for byte lane (only on data, not address)
Multiplex: Offsets i.e. A[1:0]
Byte enable: Active low while ALE active
(Valid for both reads and writes)
C
ONFIGURING A
The properties of a chip select region on the generic bus are configured by writing a set of registers. There are
eight sets, denoted by having _0 to _7 appended to the register names used in this discussion.
A R
DDRESS ANGE
The address range allocated to the generic bus is partitioned by configuring the base address and size of each
region. The base address of the region always has bits [39:30] and [15:0] as zero, bits [29:16] are set in the
io_ext_start_addr register. This allows the start address to be set on any 64KB boundary below
00_4000_0000. If the start address is set below the base address of the generic bus range (00_1009_0000)
the region is disabled. The region start address is subtracted from addresses as they pass through the bus
interface, so each device sees a contiguous block starting from zero.
The size of the r egion is set in t he io_e xt_m ult _size re gister . The size of the re gion is
64KB * (io_ext_mult_size+1). Since only 12 bits of the register are valid, the minimum region size is 64KB,
and the maximum size is 256MB. An alternative way of thinking about this is that the last address in the region
has bits [39:30] all zero, bits [29:16] equal to io_ext_start_addr + io_ext_mult_size and bits [15:0] all ones.
If the last address of the region is set above 00_3FFF_FFFF some of the region will not be accessible.
Page 362 Section 11: Generic/Boot Bus

Table 247: Byte Lanes for the Generic Bus

BE[3:0]
C S R
HIP ELECT
B r oadco m C orp or ati on
IO_AD[31:24] IO_AD[23:16]
D[7:0] A[23:16]
A[27:24] A[23:16]
D[7:0]
D[15:8] D[7:0]
D[31:24] D[23:16]
D[7:0] CE1#
D[7:0] CE1# D[15:8] CE2#
D[7:0] D[15:8]
D[7:0] D[15:8]
IO_ADP[3] IO_ADP[2]
+0
IO_AD[31] IO_AD[30]
EGION
User Manual
IO_AD[15:8]
A[15:8]
A[15:8]
D[15:8]
D[23:16]
IO_ADP[1]
+1 +2
IO_AD[29]
Document 1250_1125-UM100CB-R
10/21/02
IO_AD[7:0]
A[7:0]
A[7:0]
D[7:0]
D[31:24]
D[7:0]
IO_ADP[0]
+3
IO_AD[28]