Using The Pcmcia Card - Broadcom BCM1250 User Manual

User Manual
10/21/02
CompactFlash and CF+ cards have a similar interface to the PCMCIA cards. They also support a TrueIDE
mode, which cannot be directly connected, but they are required to be able to work in the other modes so this
should not be a problem. If only the memory mode of CF/CF+ cards is required then the interface is the same
as the memory only PCMCIA interface presented above. However, CF/CF+ cards must be able to operate at
3.3V so the voltage level translators can be avoided (in this case software will have to reject any cards that
require 5V for full operation).
U T PCMCIA C
SING HE
The generic bus address window scheme is used to map between the system address space and the PCMCIA
flash memory address space. The PCMCIA cards are accessed through region 6 of the generic bus address
space. The usual io_start_addr and io_multi_size registers are configured to set the base address that the
card appears in the system address space and its size. The base address of the region will be mapped to
address zero in the PCMCIA space, so PCMCIA card addresses can be computed by adding this offset. In
addition the pcmcia_reg bit within the pcmcia_cfg register must be set according to whether the flash card's
attribute or common memory is being accessed. This bit defaults to the low state which selects the common
memory.
The card timing is configured using the generic bus timing registers. Since these default to being appropriate
for the boot ROM (see
region 6 for PCMCIA access at system startup.
The first access to a card after power on should be an attribute memory read. The pcmcia_cfg_reg bit should
be set to allow this. The transfer is 16 bits but only the even byte contains valid data because attributes are
stored in even byte locations only. The initial attribute memory accesses should be used to extract details from
the Card Information Structure (CIS). These details include the card identification and the timing parameters
for the card (which will generally have a faster access time than the default). Software should update the
parameters for the generic bus region 6. Once the CIS has been read the pcmcia_cfg_reg bit can be cleared
to allow access to the memory portion of the card.
The PCMCIA controller monitors status change events and generates an interrupt. The interrupt is cleared by
reading the pcmcia_status register. An interrupt mask is provided so specific status change events can be
masked out. The PCMCIA controller supports 3 card conditions or events:
• Card insertion or removal.
• Card READY status change.
• Card WP write protect state change.
Software can perform a card reset by setting the reset bit high inside the pcmcia_cfg control register. The flash
card remains in reset until the reset bit is set low. The reset signal is set when the system powers up and when
no card is detected.
Document 1250_1125-UM100CB-R
ARD
Section: "Generic Bus Timing" on page
B r oadco m C orp or ati on
BCM1250/BCM1125/BCM1125H
365) software should configure the timing in
Section 12: PCMCIA Control Interface Page 389